| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_lower_undef_to_zero.c | 51 nir_ssa_def *zero = nir_imm_zero(b, und->def.num_components,
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| nir_lower_texcoord_replace.c | 94 nir_ssa_def *zero = nir_imm_zero(&b, 1, new_coord->bit_size);
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| nir_lower_variable_initializers.c | 185 nir_store_shared(&b, nir_imm_zero(&b, chunk_comps, 32), offset,
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| nir_opt_offsets.c | 108 replace_src = nir_imm_zero(b, off_src->ssa->num_components, off_src->ssa->bit_size);
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| nir_lower_idiv.c | 230 nir_ssa_def *zero = nir_imm_zero(b, 1, sz);
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| nir_conversion_builder.h | 96 return nir_bcsel(b, nir_flt(b, src, nir_imm_zero(b, 1, src->bit_size)),
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| nir_lower_io_arrays_to_elements.c | 121 nir_ssa_def *zero = nir_imm_zero(b, intr->dest.ssa.num_components,
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| nir_lower_int64.c | 510 nir_ssa_def *q_lo = nir_imm_zero(b, n->num_components, 32);
511 nir_ssa_def *q_hi = nir_imm_zero(b, n->num_components, 32);
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| nir_lower_io.c | 658 nir_imm_zero(b, intrin->dest.ssa.num_components,
1403 nir_ssa_def *zero = nir_imm_zero(b, load->num_components, bit_size);
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/bifrost/ |
| bi_lower_divergent_indirects.c | 95 nir_ssa_def *zero = has_dest ? nir_imm_zero(b, 1, size) : NULL;
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| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| anv_nir_lower_ubo_loads.c | 85 nir_ssa_def *zero = nir_imm_zero(b, load->num_components, bit_size);
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| anv_nir_lower_multiview.c | 165 return nir_imm_zero(b, 1, 32);
207 nir_store_var(&b, layer_id_out, nir_imm_zero(&b, 1, 32), 0x1);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| sfn_nir_legalize_image_load_store.cpp | 47 default_value = nir_imm_zero(b, nir_dest_num_components(ir->dest),
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| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_nir_lower_ngg.c | 339 : nir_imm_zero(b, 1, 32);
342 : nir_imm_zero(b, 1, 32);
400 nir_build_store_output(b, prim_id, nir_imm_zero(b, 1, 32),
1129 nir_build_store_shared(b, nir_imm_zero(b, 1, 8), es_vertex_lds_addr, .write_mask = 0x1u, .align_mul = 4, .base = lds_es_vertex_accepted);
1451 nir_ssa_def *zero_u8 = nir_imm_zero(b, 1, 8);
1794 nir_if *if_wave_0 = nir_push_if(b, nir_ieq(b, nir_build_load_subgroup_id(b), nir_imm_zero(b, 1, 32)));
1816 nir_ssa_def *vertex_live = nir_ine(b, out_vtx_primflag_0, nir_imm_zero(b, 1, out_vtx_primflag_0->bit_size));
1827 nir_if *if_wave_0 = nir_push_if(b, nir_ieq(b, nir_build_load_subgroup_id(b), nir_imm_zero(b, 1, 32)));
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| ac_nir_lower_esgs_io_to_mem.c | 221 return emit_split_buffer_load(b, ring, off, nir_imm_zero(b, 1, 32), 4u * wave_size,
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| ac_nir_lower_tess_io_to_mem.c | 538 nir_build_store_buffer_amd(b, ctrlw, tessfactor_ring, nir_imm_zero(b, 1, 32), tess_factors_base, .write_mask = 0x1u);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/tests/ |
| serialize_tests.cpp | 127 nir_ssa_def *zero = nir_imm_zero(b, GetParam(), 32);
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_lower_int64.c | 496 nir_ssa_def *q_lo = nir_imm_zero(b, n->num_components, 32);
497 nir_ssa_def *q_hi = nir_imm_zero(b, n->num_components, 32);
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| nir_builder.h | 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size) function
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| nir_lower_io.c | 757 nir_ssa_def *zero = nir_imm_zero(b, load->num_components,
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/d3d12/ |
| d3d12_nir_passes.c | 555 nir_ssa_def *zero = nir_imm_zero(&b, 4, 32);
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| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_nir_lower_storage_image.c | 436 nir_ssa_def *zero = nir_imm_zero(b, load->num_components, 32);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_nir_lower_image_load_store.c | 492 nir_ssa_def *zero = nir_imm_zero(b, load->num_components, 32);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/spirv/ |
| vtn_alu.c | 1048 nir_ssa_def *const zero = nir_imm_zero(&b->nb, 1, 32);
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| radv_shader.c | 343 def = nir_imm_zero(&b, 1, 32);
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