| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| brw_nir_lower_alpha_to_coverage.c | 75 return nir_ior(b, nir_imul_imm(b, part_a, 0x1111), 76 nir_ior(b, nir_imul_imm(b, part_b, 0x0808), 77 nir_imul_imm(b, part_c, 0x0100)));
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| brw_nir_rt_builder.h | 92 return nir_imul_imm(b, nir_load_ray_num_dss_rt_stacks_intel(b), 109 nir_imul_imm(b, brw_nir_rt_stack_id(b), BRW_RT_SIZEOF_HOTZONE); 112 nir_imul_imm(b, brw_nir_num_rt_stacks(b, devinfo), 256 nir_ssa_def *ptr64 = nir_imul_imm(b, nir_pack_64_2x32(b, vec2), 64);
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| brw_nir_lower_rt_intrinsics.c | 304 sysval = nir_imul_imm(b, globals.hw_stack_size, 64); 308 sysval = nir_imul_imm(b, globals.sw_stack_size, 64);
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| brw_nir_lower_cs_intrinsics.c | 139 nir_imul_imm(b,
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/util/ |
| pan_lower_sample_position.c | 51 nir_u2u64(b, nir_imul_imm(b, nir_load_sample_id(b), 4)));
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/lima/ir/ |
| lima_nir_lower_uniform_to_scalar.c | 47 nir_src_for_ssa(nir_imul_imm(b, intr->src[0].ssa, 4));
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| /xsrc/external/mit/MesaLib/dist/src/amd/common/ |
| ac_nir_lower_tess_io_to_mem.c | 219 nir_ssa_def *base_off_var = nir_imul_imm(b, vertex_idx, st->tcs_num_reserved_inputs * 16u); 275 nir_ssa_def *tcs_in_patch_stride = nir_imul_imm(b, tcs_in_vtxcnt, tcs_in_vertex_stride); 279 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, tcs_in_vertex_stride); 301 nir_ssa_def *input_patch_size = nir_imul_imm(b, tcs_in_vtxcnt, st->tcs_num_reserved_inputs * 16u); 309 nir_ssa_def *patch_offset = nir_imul_imm(b, rel_patch_id, output_patch_stride); 314 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, output_vertex_size); 334 nir_ssa_def *attr_stride = nir_imul(b, tcs_num_patches, nir_imul_imm(b, out_vertices_per_patch, 16u)); 338 nir_ssa_def *patch_offset = nir_imul(b, rel_patch_id, nir_imul_imm(b, out_vertices_per_patch, 16u)); 341 nir_ssa_def *vertex_index_off = nir_imul_imm(b, vertex_index, 16u); 357 nir_ssa_def *per_vertex_output_patch_size = nir_imul_imm(b, out_vertices_per_patch, st->tcs_num_reserved_outputs * 16u) [all...] |
| ac_nir_lower_esgs_io_to_mem.c | 141 nir_ssa_def *off = nir_iadd(b, nir_imul_imm(b, vertex_idx, esgs_itemsize), io_off); 203 return nir_imul_imm(b, off, 4u);
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| ac_nir_lower_ngg.c | 164 nir_ssa_def *shift = nir_iadd_imm_nuw(b, nir_imul_imm(b, lane_id, -4u), num_lds_dwords * 16); 293 return nir_imul_imm(b, vertex_idx, per_vtx_bytes); 1434 nir_ssa_def *out_vtx_offs = nir_imul_imm(b, out_vtx_idx, s->lds_bytes_per_gs_out_vertex); 1442 nir_ssa_def *gs_out_vtx_base = nir_imul_imm(b, tid_in_tg, b->shader->info.gs.vertices_out); 1487 num_prims_in_wave = nir_imul_imm(b, num_threads, total_prm_cnt); 1492 prm_cnt = nir_iadd_nuw(b, nir_imul_imm(b, prm_cnt, -1u * (s->num_vertices_per_primitive - 1)), gs_vtx_cnt);
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| /xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/ |
| v3d_nir_lower_scratch.c | 50 return nir_imul_imm(b, offset, V3D_CHANNELS);
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| /xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/ |
| v3d_nir_lower_scratch.c | 50 return nir_imul_imm(b, offset, V3D_CHANNELS);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/tests/ |
| load_store_vectorizer_tests.cpp | 606 nir_ssa_def *index_base = nir_imul_imm(b, inv, 0xfffffffc); 607 nir_ssa_def *index_base_prev = nir_imul_imm(b, inv_plus_one, 0xfffffffc); 1589 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 2), 16), 32), 0x1); 1591 nir_iadd_imm(b, nir_imul_imm(b, nir_iadd_imm(b, index_base, 3), 16), 32), 0x2); 1605 nir_ssa_def *low = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 12); 1606 nir_ssa_def *high = nir_imul_imm(b, nir_iadd_imm(b, index_base, 1), 16); 1660 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 4); 1686 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); 1703 nir_ssa_def *offset = nir_iadd_imm(b, nir_imul_imm(b, index_base, 16), 16); 1836 nir_ssa_def *first = nir_imul_imm(b, index_base, 0x100000000) [all...] |
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| nir_lower_uniforms_to_ubo.c | 77 nir_iadd_imm(b, nir_imul_imm(b, uniform_offset, multiplier),
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| nir_lower_variable_initializers.c | 172 nir_ssa_def *first_offset = nir_imul_imm(&b, local_index, chunk_size);
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| nir_lower_locals_to_regs.c | 172 nir_imul_imm(b, index, inner_array_size));
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/lib/ |
| pan_indirect_draw.c | 419 nir_imul_imm(b, builder->draw.vertex_start, index_size); 595 nir_imul_imm(b, attrib_idx, 599 nir_imul_imm(b, attrib_idx, 848 nir_imul_imm(b, builder->draw.vertex_start, index_size)); 852 nir_imul_imm(b, builder->draw.vertex_count, index_size)); 1010 nir_imul_imm(b, builder->draw.vertex_start, index_size)); 1015 nir_iadd(b, start, nir_imul_imm(b, builder->draw.vertex_count, index_size)); 1024 start = nir_iadd(b, start, nir_imul_imm(b, thread_id, sizeof(uint32_t)));
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| /xsrc/external/mit/MesaLib/dist/src/intel/vulkan/ |
| anv_nir_compute_push_layout.c | 171 nir_imul_imm(b, intrin->src[0].ssa, sizeof(uint64_t)),
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| anv_nir_apply_pipeline_layout.c | 460 nir_iadd(b, desc_offset, nir_imul_imm(b, res.array_index, stride)); 541 nir_load_push_constant(b, 1, 32, nir_imul_imm(b, dyn_offset_idx, 4),
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| gl_nir_lower_buffers.c | 59 nir_ssa_def *arr_offset = nir_imul_imm(b, arr_index, array_elements);
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| brw_nir_lower_cs_intrinsics.c | 71 nir_imul_imm(b, subgroup_id, state->dispatch_width);
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/nir/ |
| nir_lower_io.c | 182 nir_imul_imm(b, nir_ssa_for_src(b, (*p)->arr.index, 1), size); 925 nir_imul_imm(b, index, stride)); 933 nir_imul_imm(b, index, stride));
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| nir_deref.c | 208 offset = nir_iadd(b, offset, nir_imul_imm(b, index, stride));
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/ |
| anv_nir_apply_pipeline_layout.c | 529 nir_imul_imm(b, array_index, descriptor_size)); 602 dyn_load->src[0] = nir_src_for_ssa(nir_imul_imm(b, dyn_offset_idx, 4)); 706 nir_imul_imm(b, arr_index, descriptor_size));
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| /xsrc/external/mit/MesaLib/dist/src/freedreno/vulkan/ |
| tu_shader.c | 359 nir_imul_imm(b, arr_index, 2)); 384 nir_imul_imm(b, arr_index, descriptor_stride));
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| /xsrc/external/mit/MesaLib/dist/src/microsoft/compiler/ |
| dxil_nir.c | 365 nir_ssa_def *shift = nir_imul_imm(b, pos, 8); 497 nir_imul_imm(b, nir_iand(b, offset, nir_imm_int(b, 3)), 8);
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