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    Searched refs:offset4 (Results 1 - 3 of 3) sorted by relevancy

  /xsrc/external/mit/xf86-video-ati/dist/src/
radeon_video.c 2515 int offset3, int offset4,
2692 offset4 -= base_offset;
2702 offset4 += ((left >> 16) & ~15);
2715 offset4 += ((left >> 16) & ~7) << 1;
2838 OUTREG(RADEON_OV0_VID_BUF3_BASE_ADRS, offset4);
3472 unsigned int offset1, offset2, offset3, offset4, s2offset, s3offset; local
3613 offset4 = offset2;
3619 offset4 = offset3+dstPitch;
3625 offset4 = offset2;
3631 OUTREG(RADEON_CAP0_BUF1_EVEN_OFFSET, offset4+display_base)
    [all...]
  /xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/gallivm/
lp_bld_format_s3tc.c 2228 LLVMValueRef offset4, i4, j4, rgba4[LP_MAX_VECTOR_LENGTH/16]; local
2240 offset4 = lp_build_extract_range(gallivm, offset, count * 4, 4);
2243 &alpha_lo, &alpha_hi, base_ptr, offset4);
2583 LLVMValueRef offset4, i4, j4, rgba4[LP_MAX_VECTOR_LENGTH/16]; local
2592 offset4 = lp_build_extract_range(gallivm, offset, count * 4, 4);
2595 &green_lo, &green_hi, base_ptr, offset4);
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/gallivm/
lp_bld_format_s3tc.c 2186 LLVMValueRef offset4, i4, j4, rgba4[LP_MAX_VECTOR_LENGTH/16]; local
2198 offset4 = lp_build_extract_range(gallivm, offset, count * 4, 4);
2201 &alpha_lo, &alpha_hi, base_ptr, offset4);

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