Searched refs:out_reg (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/
H A Dr200_vertprog.h111 #define MAKE_VSF_OP(op, out_reg, out_reg_fields) \
112 ((op) | (out_reg) | ((out_reg_fields) << 20) )
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/
H A Dr200_vertprog.h111 #define MAKE_VSF_OP(op, out_reg, out_reg_fields) \
112 ((op) | (out_reg) | ((out_reg_fields) << 20) )
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_render.c387 int out_reg = FS_OC; local in function:i915_emit_composite_setup
481 out_reg = FS_U0;
508 i915_fs_mov(out_reg, i915_fs_operand_reg(FS_R0));
533 i915_fs_mul(out_reg, i915_fs_operand(FS_R0, W, W, W, W),
536 i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
540 i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
545 i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W));
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/panfrost/midgard/
H A Ddisassemble.c302 * type of the operation itself, directly at the out_reg register
396 print_dest(reg_info->out_reg, mode, alu_field->dest_override, out_high);
484 print_reg(reg_info->out_reg, 32);
486 print_reg(reg_info->out_reg * 2 + (alu_field->output_component >> 2),
H A Dmidgard.h247 unsigned out_reg : 5; member in struct:__anon43e15d220c08
H A Dmidgard_compile.c1842 int in_reg = reg, out_reg = reg; local in function:emit_tex
1924 ins.texture.out_reg_select = out_reg;
1941 int o_reg = REGISTER_TEXTURE_BASE + out_reg, o_index = nir_dest_index(ctx, &instr->dest);
2149 ins->registers.out_reg = dealias_register(ctx, g, args.dest, ctx->temp_count);
2707 if (qins->registers.out_reg != 0) {
2710 written_mask |= (1 << qins->registers.out_reg);
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.c1685 int out_reg = FS_OC; local in function:gen3_composite_emit_shader
1687 out_reg = FS_U0;
1773 gen3_fs_mov(out_reg,
1776 gen3_fs_mov(out_reg,
1782 gen3_fs_mul(out_reg,
1786 gen3_fs_mul(out_reg,
1809 gen3_fs_mov(out_reg,
1813 gen3_fs_mul(out_reg,
1833 gen3_fs_mov(out_reg,
1836 gen3_fs_mov(out_reg,
[all...]
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.c1661 int out_reg = FS_OC; local in function:gen3_composite_emit_shader
1663 out_reg = FS_U0;
1749 gen3_fs_mov(out_reg,
1752 gen3_fs_mov(out_reg,
1758 gen3_fs_mul(out_reg,
1762 gen3_fs_mul(out_reg,
1785 gen3_fs_mov(out_reg,
1789 gen3_fs_mul(out_reg,
1809 gen3_fs_mov(out_reg,
1812 gen3_fs_mov(out_reg,
[all...]
/xsrc/external/mit/MesaLib/dist/src/panfrost/midgard/
H A Dmidgard.h353 unsigned out_reg : 5; member in struct:__anon60a087ed0f08
H A Ddisassemble.c838 print_dest(ctx, fp, reg_info->out_reg);
953 print_dest(ctx, fp, reg_info->out_reg);
H A Dmidgard_emit.c875 .out_reg = (ins->dest == ~0 ?

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