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    Searched refs:p2pll_div_0 (Results 1 - 6 of 6) sorted by relevancy

  /xsrc/external/mit/xf86-video-ati/dist/src/
legacy_crtc.c 432 restore->p2pll_div_0 & RADEON_P2PLL_FB0_DIV_MASK);
454 restore->p2pll_div_0,
458 restore->p2pll_div_0,
475 (unsigned)restore->p2pll_div_0,
481 (unsigned)restore->p2pll_div_0 & RADEON_P2PLL_FB0_DIV_MASK,
482 (unsigned)((restore->p2pll_div_0 &
624 save->p2pll_div_0 = INPLL(pScrn, RADEON_P2PLL_DIV_0);
631 (unsigned)save->p2pll_div_0,
636 (unsigned)(save->p2pll_div_0 & RADEON_P2PLL_FB0_DIV_MASK),
637 (unsigned)((save->p2pll_div_0 & RADEON_P2PLL_POST0_DIV_MASK
    [all...]
radeon_probe.h 662 uint32_t p2pll_div_0; member in struct:__anon6870
radeon_tv.c 1277 save->p2pll_div_0 = (constPtr->crtcPLL_N & 0x7ff) | (postDiv << 16);
  /xsrc/external/mit/xf86-video-r128/dist/src/
r128_crtc.c 457 save->p2pll_div_0 = (save->feedback_div_2 | (post_div->bitvalue<<16));
601 restore->p2pll_div_0, ~R128_P2PLL_FB0_DIV_MASK);
607 restore->p2pll_div_0, ~R128_P2PLL_POST0_DIV_MASK);
624 restore->p2pll_div_0,
630 restore->p2pll_div_0 & R128_P2PLL_FB0_DIV_MASK,
631 (restore->p2pll_div_0 &
r128.h 237 uint32_t p2pll_div_0; member in struct:__anon167
r128_driver.c 2417 save->p2pll_div_0 = INPLL(pScrn, R128_P2PLL_DIV_0);
2423 save->p2pll_div_0,
2428 save->p2pll_div_0 & R128_P2PLL_FB0_DIV_MASK,
2429 (save->p2pll_div_0 &

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