Searched refs:pa_sc_mode_cntl_0 (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_private.h1341 uint32_t pa_sc_mode_cntl_0; member in struct:radv_multisample_state
H A Dradv_pipeline.c1121 ms->pa_sc_mode_cntl_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX9) |
1127 ms->pa_sc_mode_cntl_0 |= S_028A48_MSAA_ENABLE(1);
H A Dradv_cmd_buffer.c670 radeon_set_context_reg(cmd_buffer->cs, R_028A48_PA_SC_MODE_CNTL_0, ms->pa_sc_mode_cntl_0);
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_pipeline.c1103 ms->pa_sc_mode_cntl_0 = S_028A48_ALTERNATE_RBS_PER_TILE(
1110 ms->pa_sc_mode_cntl_0 |= S_028A48_LINE_STIPPLE_ENABLE(rast_line->stippledLineEnable);
1131 ms->pa_sc_mode_cntl_0 |= S_028A48_MSAA_ENABLE(1);
4356 radeon_emit(ctx_cs, ms->pa_sc_mode_cntl_0);
H A Dradv_private.h1715 uint32_t pa_sc_mode_cntl_0; member in struct:radv_multisample_state

Completed in 34 milliseconds