Searched refs:pipeline_nir (Results 1 - 3 of 3) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/frontends/lavapipe/
H A Dlvp_pipeline.c653 pipeline->pipeline_nir[stage] = nir;
659 state->ir.nir = pipeline->pipeline_nir[stage];
728 device->physical_device->pscreen->finalize_nir(device->physical_device->pscreen, pipeline->pipeline_nir[stage]);
731 shstate.prog = (void *)pipeline->pipeline_nir[MESA_SHADER_COMPUTE];
733 shstate.req_local_mem = pipeline->pipeline_nir[MESA_SHADER_COMPUTE]->info.shared_size;
742 nir_xfb_info *xfb_info = nir_gather_xfb_info(pipeline->pipeline_nir[stage], NULL);
747 nir_foreach_shader_out_variable(var, pipeline->pipeline_nir[stage]) {
867 if (!pipeline->pipeline_nir[stage])
871 if (pipeline->pipeline_nir[MESA_SHADER_FRAGMENT]) {
872 if (pipeline->pipeline_nir[MESA_SHADER_FRAGMEN
[all...]
H A Dlvp_private.h482 nir_shader *pipeline_nir[MESA_SHADER_STAGES]; member in struct:lvp_pipeline
H A Dlvp_execute.c366 state->dispatch_info.block[0] = pipeline->pipeline_nir[MESA_SHADER_COMPUTE]->info.workgroup_size[0];
367 state->dispatch_info.block[1] = pipeline->pipeline_nir[MESA_SHADER_COMPUTE]->info.workgroup_size[1];
368 state->dispatch_info.block[2] = pipeline->pipeline_nir[MESA_SHADER_COMPUTE]->info.workgroup_size[2];

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