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    Searched refs:ppll_div_3 (Results 1 - 6 of 6) sorted by relevancy

  /xsrc/external/mit/xf86-video-ati/dist/src/
legacy_crtc.c 315 restore->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK);
325 (restore->ppll_div_3 == (INPLL(pScrn, RADEON_PPLL_DIV_3) &
379 restore->ppll_div_3,
383 restore->ppll_div_3,
401 restore->ppll_div_3,
407 restore->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK,
408 (restore->ppll_div_3 & RADEON_PPLL_POST3_DIV_MASK) >> 16);
603 save->ppll_div_3 = INPLL(pScrn, RADEON_PPLL_DIV_3);
610 save->ppll_div_3,
615 save->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK
    [all...]
radeon_probe.h 649 unsigned ppll_div_3; member in struct:__anon6870
radeon_tv.c 1173 save->ppll_div_3 = (constPtr->crtcPLL_N & 0x7ff) | (postDiv << 16);
  /xsrc/external/mit/xf86-video-r128/dist/src/
r128_crtc.c 399 save->ppll_div_3 = (save->feedback_div | (post_div->bitvalue << 16));
524 restore->ppll_div_3, ~R128_PPLL_FB3_DIV_MASK);
527 restore->ppll_div_3, ~R128_PPLL_POST3_DIV_MASK);
552 restore->ppll_div_3,
558 restore->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
559 (restore->ppll_div_3 &
909 info->ModeReg.ppll_div_3 = info->SavedReg.ppll_div_3;
r128.h 225 uint32_t ppll_div_3; member in struct:__anon167
r128_driver.c 2396 save->ppll_div_3 = INPLL(pScrn, R128_PPLL_DIV_3);
2403 save->ppll_div_3,
2408 save->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
2409 (save->ppll_div_3 &

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