Searched refs:ppll_div_3 (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dlegacy_crtc.c315 restore->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK);
325 (restore->ppll_div_3 == (INPLL(pScrn, RADEON_PPLL_DIV_3) &
379 restore->ppll_div_3,
383 restore->ppll_div_3,
401 restore->ppll_div_3,
407 restore->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK,
408 (restore->ppll_div_3 & RADEON_PPLL_POST3_DIV_MASK) >> 16);
603 save->ppll_div_3 = INPLL(pScrn, RADEON_PPLL_DIV_3);
610 save->ppll_div_3,
615 save->ppll_div_3
[all...]
H A Dradeon_probe.h649 unsigned ppll_div_3; member in struct:__anon297917400b08
H A Dradeon_tv.c1173 save->ppll_div_3 = (constPtr->crtcPLL_N & 0x7ff) | (postDiv << 16);
/xsrc/external/mit/xf86-video-r128/dist/src/
H A Dr128_crtc.c397 save->ppll_div_3 = (save->feedback_div | (post_div->bitvalue << 16));
521 restore->ppll_div_3, ~R128_PPLL_FB3_DIV_MASK);
524 restore->ppll_div_3, ~R128_PPLL_POST3_DIV_MASK);
549 restore->ppll_div_3,
555 restore->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
556 (restore->ppll_div_3 &
904 info->ModeReg.ppll_div_3 = info->SavedReg.ppll_div_3;
H A Dr128.h228 uint32_t ppll_div_3; member in struct:__anona5d7874c0208
H A Dr128_driver.c2411 save->ppll_div_3 = INPLL(pScrn, R128_PPLL_DIV_3);
2418 save->ppll_div_3,
2423 save->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
2424 (save->ppll_div_3 &

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