Searched refs:queue_mask (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_meta_copy.c181 uint32_t queue_mask = radv_image_queue_family_mask(image, cmd_buffer->queue_family_index, local in function:copy_buffer_to_image
185 layout, false, queue_mask);
308 uint32_t queue_mask = radv_image_queue_family_mask(image, cmd_buffer->queue_family_index, local in function:copy_image_to_buffer
312 layout, false, queue_mask);
412 uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->queue_family_index, local in function:copy_image
416 false, queue_mask) &&
552 uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->queue_family_index, local in function:copy_image
556 false, queue_mask)) {
H A Dradv_meta_resolve.c378 uint32_t queue_mask = radv_image_queue_family_mask(dest_image, cmd_buffer->queue_family_index, local in function:radv_pick_resolve_method_images
388 dest_render_loop, queue_mask)) {
493 uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->queue_family_index, local in function:radv_meta_resolve_hardware_image
497 dst_image_layout, false, queue_mask)) {
696 uint32_t queue_mask = radv_image_queue_family_mask(dst_img, cmd_buffer->queue_family_index, local in function:radv_cmd_buffer_resolve_subpass_hw
700 dst_image_layout, false, queue_mask)) {
H A Dradv_image.c2086 VkImageLayout layout, bool in_render_loop, unsigned queue_mask)
2095 (radv_image_has_htile(image) && queue_mask == (1u << RADV_QUEUE_GENERAL));
2108 if (radv_image_is_tc_compat_htile(image) && queue_mask & (1u << RADV_QUEUE_GENERAL) &&
2134 unsigned queue_mask)
2137 !radv_layout_dcc_compressed(device, image, level, layout, in_render_loop, queue_mask))
2150 return queue_mask == (1u << RADV_QUEUE_GENERAL) || radv_image_use_comp_to_single(device, image);
2156 unsigned queue_mask)
2161 if (image->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT && queue_mask & (1u << RADV_QUEUE_FOREIGN))
2170 (queue_mask & (1u << RADV_QUEUE_COMPUTE)) && !radv_image_use_dcc_image_stores(device, image))
2178 VkImageLayout layout, unsigned queue_mask)
2085 radv_layout_is_htile_compressed(const struct radv_device * device,const struct radv_image * image,VkImageLayout layout,bool in_render_loop,unsigned queue_mask) argument
2132 radv_layout_can_fast_clear(const struct radv_device * device,const struct radv_image * image,unsigned level,VkImageLayout layout,bool in_render_loop,unsigned queue_mask) argument
2154 radv_layout_dcc_compressed(const struct radv_device * device,const struct radv_image * image,unsigned level,VkImageLayout layout,bool in_render_loop,unsigned queue_mask) argument
2177 radv_layout_fmask_compressed(const struct radv_device * device,const struct radv_image * image,VkImageLayout layout,unsigned queue_mask) argument
[all...]
H A Dradv_meta_resolve_cs.c672 uint32_t queue_mask = radv_image_queue_family_mask(dest_image, cmd_buffer->queue_family_index, local in function:radv_meta_resolve_compute_image
677 dest_image_layout, false, queue_mask) &&
762 dest_image_layout, false, queue_mask)) {
927 uint32_t queue_mask = radv_image_queue_family_mask(dst_image, cmd_buffer->queue_family_index, local in function:radv_depth_stencil_resolve_subpass_cs
930 if (radv_layout_is_htile_compressed(cmd_buffer->device, dst_image, layout, false, queue_mask)) {
H A Dradv_meta_clear.c655 uint32_t queue_mask = radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, local in function:depth_view_can_fast_clear
669 queue_mask) &&
2352 uint32_t queue_mask = radv_image_queue_family_mask(image, cmd_buffer->queue_family_index, local in function:radv_cmd_clear_image
2360 image_layout, false, queue_mask)) {
H A Dradv_private.h2000 bool in_render_loop, unsigned queue_mask);
2004 unsigned queue_mask);
2008 unsigned queue_mask);
2011 VkImageLayout layout, unsigned queue_mask);
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_meta_copy.c191 uint32_t queue_mask = radv_image_queue_family_mask(image, local in function:meta_copy_buffer_to_image
194 MAYBE_UNUSED bool compressed = radv_layout_dcc_compressed(image, layout, queue_mask);
335 uint32_t queue_mask = radv_image_queue_family_mask(image, local in function:meta_copy_image_to_buffer
338 MAYBE_UNUSED bool compressed = radv_layout_dcc_compressed(image, layout, queue_mask);
H A Dradv_meta_resolve.c340 uint32_t queue_mask = radv_image_queue_family_mask(dest_image, local in function:radv_pick_resolve_method_images
353 if (radv_layout_dcc_compressed(dest_image, dest_image_layout, queue_mask)) {
750 uint32_t queue_mask = local in function:radv_decompress_resolve_src
756 queue_mask)) {
H A Dradv_image.c1317 unsigned queue_mask)
1325 queue_mask == (1u << RADV_QUEUE_GENERAL)));
1330 unsigned queue_mask)
1338 queue_mask == (1u << RADV_QUEUE_GENERAL)));
1343 unsigned queue_mask)
1350 unsigned queue_mask)
1354 (queue_mask & (1u << RADV_QUEUE_COMPUTE)))
1315 radv_layout_has_htile(const struct radv_image * image,VkImageLayout layout,unsigned queue_mask) argument
1328 radv_layout_is_htile_compressed(const struct radv_image * image,VkImageLayout layout,unsigned queue_mask) argument
1341 radv_layout_can_fast_clear(const struct radv_image * image,VkImageLayout layout,unsigned queue_mask) argument
1348 radv_layout_dcc_compressed(const struct radv_image * image,VkImageLayout layout,unsigned queue_mask) argument
H A Dradv_private.h1557 unsigned queue_mask);
1567 unsigned queue_mask);
1571 unsigned queue_mask);
1575 unsigned queue_mask);
H A Dradv_meta_clear.c638 uint32_t queue_mask = radv_image_queue_family_mask(iview->image, local in function:depth_view_can_fast_clear
654 radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
H A Dradv_cmd_buffer.c1605 MAYBE_UNUSED uint32_t queue_mask = radv_image_queue_family_mask(image, local in function:radv_emit_framebuffer_state
1609 assert(radv_layout_has_htile(image, layout, queue_mask) ==
1610 radv_layout_is_htile_compressed(image, layout, queue_mask));

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