| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/winsys/amdgpu/ |
| H A D | radv_amdgpu_bo.h | 59 uint32_t range_count; member in struct:radv_amdgpu_winsys_bo::__anon58c86776010a::__anon58c867760308
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| H A D | radv_amdgpu_bo.c | 125 if (bo->bo_capacity < bo->range_count) {
126 uint32_t new_count = MAX2(bo->bo_capacity * 2, bo->range_count);
136 for (uint32_t i = 0; i < bo->range_count; ++i)
170 if (parent->range_capacity - parent->range_count < 2) {
185 while (first + 1 < parent->range_count &&
190 while (last + 1 < parent->range_count && parent->ranges[last + 1].offset <= offset + size)
260 sizeof(struct radv_amdgpu_map_range) * (parent->range_count - last - 1));
276 parent->range_count += range_count_delta;
367 for (uint32_t i = 0; i < bo->range_count; ++i) {
450 bo->range_count
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/winsys/amdgpu/ |
| H A D | radv_amdgpu_bo.h | 63 uint32_t range_count; member in struct:radv_amdgpu_winsys_bo::__anonf1df9bc3010a::__anonf1df9bc30308
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| H A D | radv_amdgpu_bo.c | 110 if (bo->bo_capacity < bo->range_count) {
111 uint32_t new_count = MAX2(bo->bo_capacity * 2, bo->range_count);
117 for (uint32_t i = 0; i < bo->range_count; ++i)
149 if (parent->range_capacity - parent->range_count < 2) {
160 while(first + 1 < parent->range_count && parent->ranges[first].offset + parent->ranges[first].size < offset)
164 while(last + 1 < parent->range_count && parent->ranges[last].offset <= offset + size)
228 sizeof(struct radv_amdgpu_map_range) * (parent->range_count - last - 1));
244 parent->range_count += range_count_delta;
257 for (uint32_t i = 0; i < bo->range_count; ++i) {
340 bo->range_count
[all...] |
| /xsrc/external/mit/freetype/dist/include/freetype/internal/ |
| H A D | cfftypes.h | 286 FT_UInt range_count; member in struct:CFF_FDSelectRec_
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | radv_descriptor_set.c | 720 uint64_t bo_size = 0, bo_count = 0, range_count = 0; local in function:radv_CreateDescriptorPool
749 range_count += pCreateInfo->pPoolSizes[i].descriptorCount;
797 host_size += sizeof(struct radv_descriptor_range) * range_count;
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| H A D | radv_meta_clear.c | 2332 uint32_t range_count, const VkImageSubresourceRange *ranges, bool cs)
2355 for (uint32_t r = 0; r < range_count; r++) {
2376 for (uint32_t r = 0; r < range_count; r++) {
2413 for (unsigned i = 0; i < range_count; i++) {
2330 radv_cmd_clear_image(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout image_layout,const VkClearValue * clear_value,uint32_t range_count,const VkImageSubresourceRange * ranges,bool cs) argument
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | radv_descriptor_set.c | 628 uint64_t bo_size = 0, bo_count = 0, range_count = 0; local in function:radv_CreateDescriptorPool
653 range_count += pCreateInfo->pPoolSizes[i].descriptorCount;
683 host_size += sizeof(struct radv_descriptor_range) * range_count;
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| H A D | radv_meta_clear.c | 1922 uint32_t range_count,
1949 for (uint32_t r = 0; r < range_count; r++) {
1918 radv_cmd_clear_image(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout image_layout,const VkClearValue * clear_value,uint32_t range_count,const VkImageSubresourceRange * ranges,bool cs) argument
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| /xsrc/external/mit/freetype/dist/src/cff/ |
| H A D | cffload.c | 700 fdselect->range_count = 0;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/frontends/lavapipe/ |
| H A D | lvp_execute.c | 2857 for (unsigned i = 0; i < cmd->u.clear_color_image.range_count; i++) {
2890 for (unsigned i = 0; i < cmd->u.clear_depth_stencil_image.range_count; i++) {
|