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  /xsrc/external/mit/MesaLib/dist/src/intel/compiler/
brw_eu_defines.h 1107 * TGL+ SWSB RegDist synchronization pipeline.
1109 * On TGL all instructions that use the RegDist synchronization mechanism are
1113 * in-order and use the RegDist synchronization mechanism). TGL_PIPE_NONE
1114 * doesn't provide any RegDist pipeline synchronization information and allows
1132 unsigned regdist : 3; member in struct:tgl_swsb
1139 * Construct a scheduling annotation with a single RegDist dependency. This
1147 assert(swsb.regdist == d);
1175 * in-order instruction if \p regdist is non-zero.
1178 tgl_swsb_dst_dep(struct tgl_swsb swsb, unsigned regdist)
1180 swsb.regdist = regdist
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test_fs_scoreboard.cpp 108 tgl_swsb_testcase(unsigned regdist, unsigned sbid, enum tgl_sbid_mode mode)
111 swsb.regdist = regdist;
118 a.regdist == b.regdist &&
123 if (swsb.regdist)
124 os << "@" << swsb.regdist;
127 if (swsb.regdist)
383 /* NOTE: We only need this RegDist if a long instruction is followed by a
526 /* Now the write in ADD has the tightest RegDist for both ADD and MUL. *
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brw_fs_scoreboard.cpp 37 * tracked here, and require the RegDist SWSB annotation to be set
69 * Return the RegDist pipeline the hardware will synchronize with if no
101 * Return the RegDist pipeline that will execute an instruction, or
103 * RegDist synchronization mechanism.
146 * RegDist counter calculated for any ordered dependency that crosses this
164 * coherency won't be impacted. Providing exact RegDist counts for
265 * over the synchronization mode for RegDist annotations, this is only used
866 return ordered_dependency_swsb(deps, jp, exec_all).regdist;
brw_disasm.c 1790 if (swsb.regdist)
1796 swsb.regdist);
brw_fs_generator.cpp 2480 if (inst->sources == 0 && swsb.regdist == 0 &&
2700 * have SWSB set to RegDist(1).

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