| /xsrc/external/mit/MesaLib/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_nir.cpp | 69 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 77 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 83 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 89 emit(MOV(dest, retype(brw_vec4_grf(1, 0), BRW_REGISTER_TYPE_D)));
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| H A D | test_eu_validate.cpp | 317 struct brw_reg g = retype(g0, test_case[i].type); 340 struct brw_reg g = retype(g0, t); 341 brw_MOV(p, g, retype(brw_imm_w(0), test_case[i].type)); 415 struct brw_reg g = retype(g0, test_case[i].type); 507 struct brw_reg g = retype(g0, test_case[i].type); 1191 brw_MOV(p, retype(g0, move[i].dst_type), retype(g0, move[i].src_type)); 1201 brw_SEL(p, retype(g0, BRW_REGISTER_TYPE_UB), 1202 retype(g0, BRW_REGISTER_TYPE_UB), 1203 retype(g [all...] |
| H A D | brw_vec4_generator.cpp | 96 brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1); 219 retype(brw_message_reg(inst->base_mrf), BRW_REGISTER_TYPE_UD); 225 brw_MOV(p, header, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); 299 struct brw_reg addr = vec1(retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD)); 300 struct brw_reg surface_reg = vec1(retype(surface_index, BRW_REGISTER_TYPE_UD)); 301 struct brw_reg sampler_reg = vec1(retype(sampler_index, BRW_REGISTER_TYPE_UD)); 452 retype(src1, BRW_REGISTER_TYPE_UW)); 480 suboffset(stride(retype(dst, BRW_REGISTER_TYPE_UW), 2, 2, 1), 4), 481 stride(retype(src, BRW_REGISTER_TYPE_UW), 8, 1, 0)); 500 stride(retype(src [all...] |
| H A D | brw_fs_nir.cpp | 165 fs_reg g1(retype(brw_vec8_grf(1, 0), BRW_REGISTER_TYPE_UD)); 225 stride(retype(brw_vec1_grf(1 + i, 7), 252 abld.MOV(dst, negate(retype(anded, BRW_REGISTER_TYPE_D))); 370 retype(cond_reg, BRW_REGISTER_TYPE_D)); 546 fs_reg g1 = fs_reg(retype(brw_vec1_grf(1, 1), BRW_REGISTER_TYPE_W)); 562 fs_reg g0 = fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_W)); 583 fs_reg g1_6 = fs_reg(retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_D)); 602 bld.AND(retype(result, BRW_REGISTER_TYPE_D), tmp, brw_imm_d(0xbf800000)); 642 bld.LZD(retype(result, BRW_REGISTER_TYPE_UD), 643 retype(tem [all...] |
| H A D | brw_fs_builder.h | 209 return retype(null_reg_ud(), type); 218 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_F)); 224 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); 233 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); 242 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); 480 CMP(null_reg_ud(), retype(left_low, BRW_REGISTER_TYPE_UD), 481 retype(right_low, BRW_REGISTER_TYPE_UD), mod); 677 emit(BRW_OPCODE_CMP, retype(dst, src0.type), 702 emit(BRW_OPCODE_CMPN, retype(dst, src0.type), 731 retype(ds [all...] |
| H A D | brw_fs_generator.cpp | 150 brw_reg = retype(brw_reg, reg->type); 275 retype(brw_sr0_reg(1), BRW_REGISTER_TYPE_UW)); 310 brw_MOV(p, retype(brw_mask_stack_reg(0), BRW_REGISTER_TYPE_UW), 369 brw_MOV(p, offset(retype(payload, BRW_REGISTER_TYPE_UD), 1), 370 offset(retype(implied_header, BRW_REGISTER_TYPE_UD), 1)); 384 retype(implied_header, BRW_REGISTER_TYPE_UW), 417 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); 425 retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD), 498 * In order to get around this, re retype to UW and use a stride. 501 retype(sprea [all...] |
| H A D | brw_eu_emit.c | 63 brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD), 64 retype(*src, BRW_REGISTER_TYPE_UD)); 1275 dst = spread(retype(dst, BRW_REGISTER_TYPE_W), 2); 1279 inst = brw_MOV(p, retype(dst, BRW_REGISTER_TYPE_HF), src); 1314 src = spread(retype(src, BRW_REGISTER_TYPE_W), 2); 1322 return brw_MOV(p, dst, retype(src, BRW_REGISTER_TYPE_HF)); 1435 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1436 brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1438 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1439 brw_set_src0(p, insn, vec1(retype(brw_null_re [all...] |
| H A D | brw_vec4_builder.h | 177 return retype(dst_reg(VGRF, shader->alloc.allocate( 181 return retype(null_reg_ud(), type); 190 return dst_reg(retype(brw_null_vec(dispatch_width()), 200 return dst_reg(retype(brw_null_vec(dispatch_width()), 210 return dst_reg(retype(brw_null_vec(dispatch_width()), 467 emit(BRW_OPCODE_CMP, retype(dst, src0.type), 492 emit(BRW_OPCODE_CMPN, retype(dst, src0.type),
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| H A D | brw_compile_ff_gs.c | 89 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; 93 c->reg.SVBI = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 102 c->reg.header = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 103 c->reg.temp = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 107 retype(brw_vec4_grf(i++, 0), BRW_REGISTER_TYPE_UD); 225 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), 379 vec8(retype(c->reg.destination_indices, BRW_REGISTER_TYPE_UW)); 477 retype(vertex_slot, BRW_REGISTER_TYPE_UD)); 531 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), 547 brw_AND(p, retype(brw_null_re [all...] |
| H A D | brw_reg.h | 548 retype(struct brw_reg reg, enum brw_reg_type type) function in typeref:struct:brw_reg 595 return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); 602 return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); 609 return suboffset(retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); 615 return retype(brw_vec1_reg(file, nr, subnr), BRW_REGISTER_TYPE_UD); 937 return suboffset(retype(brw_vec16_reg(BRW_ARCHITECTURE_REGISTER_FILE, 958 return retype(brw_vecn_reg(width, BRW_MESSAGE_REGISTER_FILE, nr, subnr), 1026 return retype(reg, type); 1029 return suboffset(retype(spread(reg, scale), type), i); 1072 return vec1(suboffset(retype(re [all...] |
| H A D | brw_fs_visitor.cpp | 74 fs_reg dst_f = retype(dst, BRW_REGISTER_TYPE_F); 158 struct brw_reg g1_uw = retype(brw_vec1_grf(1, 0), BRW_REGISTER_TYPE_UW); 342 struct brw_reg r1_0 = retype(brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, 1, 0), BRW_REGISTER_TYPE_UB); 383 struct brw_reg gi_uw = retype(brw_vec1_grf(1 + i, 0), BRW_REGISTER_TYPE_UW); 481 const fs_reg u8_cps_width = fs_reg(retype(brw_vec1_grf(1, 0), BRW_REGISTER_TYPE_UB)); 531 .MOV(retype(brw_flag_reg(0, i), BRW_REGISTER_TYPE_UW), 532 retype(brw_vec1_grf(1 + i, 7), BRW_REGISTER_TYPE_UW)); 595 fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0), 769 urb_handle = fs_reg(retype(brw_vec8_grf(4, 0), BRW_REGISTER_TYPE_UD)); 771 urb_handle = fs_reg(retype(brw_vec8_gr [all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/ |
| H A D | brw_vec4_gs_nir.cpp | 85 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 93 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 99 retype(get_nir_src(instr->src[0], 1), BRW_REGISTER_TYPE_UD); 105 emit(MOV(dest, retype(brw_vec4_grf(1, 0), BRW_REGISTER_TYPE_D)));
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| H A D | test_eu_validate.cpp | 798 brw_MOV(p, retype(g0, move[i].dst_type), retype(g0, move[i].src_type)); 808 brw_SEL(p, retype(g0, BRW_REGISTER_TYPE_UB), 809 retype(g0, BRW_REGISTER_TYPE_UB), 810 retype(g0, BRW_REGISTER_TYPE_UB)); 817 brw_SEL(p, retype(g0, BRW_REGISTER_TYPE_B), 818 retype(g0, BRW_REGISTER_TYPE_B), 819 retype(g0, BRW_REGISTER_TYPE_B)); 827 brw_SEL(p, retype(g0, BRW_REGISTER_TYPE_B), 828 retype(g [all...] |
| H A D | brw_fs_nir.cpp | 140 fs_reg g1(retype(brw_vec8_grf(1, 0), BRW_REGISTER_TYPE_UD)); 199 stride(retype(brw_vec1_grf(1 + i, 7), 226 abld.MOV(dst, negate(retype(anded, BRW_REGISTER_TYPE_D))); 405 retype(cond_reg, BRW_REGISTER_TYPE_D)); 582 fs_reg g0 = fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_W)); 603 fs_reg g1_6 = fs_reg(retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_D)); 622 bld.AND(retype(result, BRW_REGISTER_TYPE_D), tmp, brw_imm_d(0xbf800000)); 662 bld.LZD(retype(result, BRW_REGISTER_TYPE_UD), 663 retype(temp, BRW_REGISTER_TYPE_UD)); 670 inst = bld.ADD(result, retype(resul [all...] |
| H A D | brw_vec4_generator.cpp | 95 brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1); 222 retype(brw_message_reg(inst->base_mrf), BRW_REGISTER_TYPE_UD); 228 brw_MOV(p, header, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD)); 297 struct brw_reg addr = vec1(retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD)); 298 struct brw_reg surface_reg = vec1(retype(surface_index, BRW_REGISTER_TYPE_UD)); 299 struct brw_reg sampler_reg = vec1(retype(sampler_index, BRW_REGISTER_TYPE_UD)); 447 retype(src1, BRW_REGISTER_TYPE_UW)); 462 brw_MOV(p, retype(brw_message_reg(dst.nr + 1), BRW_REGISTER_TYPE_UD), 480 suboffset(stride(retype(dst, BRW_REGISTER_TYPE_UW), 2, 2, 1), 4), 481 stride(retype(sr [all...] |
| H A D | brw_eu_emit.c | 62 brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD), 63 retype(*src, BRW_REGISTER_TYPE_UD)); 1161 dst = spread(retype(dst, BRW_REGISTER_TYPE_W), 2); 1165 inst = brw_MOV(p, retype(dst, BRW_REGISTER_TYPE_HF), src); 1197 src = spread(retype(src, BRW_REGISTER_TYPE_W), 2); 1205 return brw_MOV(p, dst, retype(src, BRW_REGISTER_TYPE_HF)); 1316 brw_set_src0(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1317 brw_set_src1(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1319 brw_set_dest(p, insn, vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_D))); 1320 brw_set_src0(p, insn, vec1(retype(brw_null_re [all...] |
| H A D | brw_fs_generator.cpp | 147 brw_reg = retype(brw_reg, reg->type); 310 brw_MOV(p, offset(retype(payload, BRW_REGISTER_TYPE_UD), 1), 311 offset(retype(implied_header, BRW_REGISTER_TYPE_UD), 1)); 348 retype(implied_header, BRW_REGISTER_TYPE_UW), 380 struct brw_reg v1_null_ud = vec1(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); 388 retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD), 446 * In order to get around this, re retype to UW and use a stride. 449 retype(spread(indirect_byte_offset, 2), BRW_REGISTER_TYPE_UW); 498 retype(brw_VxH_indirect(0, 0), BRW_REGISTER_TYPE_D)); 500 retype(brw_VxH_indirec [all...] |
| H A D | brw_vec4_tcs.cpp | 212 read->dst = retype(dst_reg(this, glsl_type::ivec4_type), dst.type); 233 inst = emit(MOV(byte_offset(dst_reg(retype(message, value.type)), REG_SIZE), 263 src_reg vertex_index = retype(get_nir_src_imm(instr->src[0]), 276 dst_reg tmp_d = retype(tmp, BRW_REGISTER_TYPE_D); 284 src_reg tmp_src = retype(src_reg(tmp_d), BRW_REGISTER_TYPE_DF); 337 value = swizzle(retype(value, BRW_REGISTER_TYPE_DF), swiz); 340 src_reg shuffled_float = src_reg(retype(shuffled, BRW_REGISTER_TYPE_F));
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| H A D | brw_fs_builder.h | 209 return retype(null_reg_ud(), type); 218 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_F)); 224 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); 233 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); 242 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); 258 return retype(brw_vec1_grf((_group >= 16 ? 2 : 1), 7), 633 emit(BRW_OPCODE_CMP, retype(dst, src0.type), 662 retype(dst, BRW_REGISTER_TYPE_F), 663 retype(src0, BRW_REGISTER_TYPE_F), 664 retype(fix_byte_sr [all...] |
| H A D | brw_clip_line.c | 45 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; 67 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD); 80 c->reg.vertex_src_mask = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD); 81 c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_W); 85 c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD); 129 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
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| H A D | brw_vec4_builder.h | 177 return retype(dst_reg(VGRF, shader->alloc.allocate( 181 return retype(null_reg_ud(), type); 190 return dst_reg(retype(brw_null_vec(dispatch_width()), 200 return dst_reg(retype(brw_null_vec(dispatch_width()), 210 return dst_reg(retype(brw_null_vec(dispatch_width()), 468 emit(BRW_OPCODE_CMP, retype(dst, src0.type),
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| /xsrc/external/mit/xf86-video-intel/dist/src/sna/brw/ |
| H A D | brw_test_gen6.c | 136 retype(brw_vec1_grf(0,2), BRW_REGISTER_TYPE_UD), 141 retype(vec16(brw_vec8_grf(14, 0)), BRW_REGISTER_TYPE_UW), 143 retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD),
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| /xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/brw/ |
| H A D | brw_test_gen6.c | 136 retype(brw_vec1_grf(0,2), BRW_REGISTER_TYPE_UD), 141 retype(vec16(brw_vec8_grf(14, 0)), BRW_REGISTER_TYPE_UW), 143 retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD),
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| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i965/ |
| H A D | brw_ff_gs_emit.c | 61 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++; 65 c->reg.SVBI = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 74 c->reg.header = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 75 c->reg.temp = retype(brw_vec8_grf(i++, 0), BRW_REGISTER_TYPE_UD); 79 retype(brw_vec4_grf(i++, 0), BRW_REGISTER_TYPE_UD); 197 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), 350 vec8(retype(c->reg.destination_indices, BRW_REGISTER_TYPE_UW)); 448 retype(vertex_slot, BRW_REGISTER_TYPE_UD)); 502 brw_AND(p, retype(brw_null_reg(), BRW_REGISTER_TYPE_UD), 518 brw_AND(p, retype(brw_null_re [all...] |
| /xsrc/external/mit/MesaLib/dist/src/intel/tools/ |
| H A D | i965_gram.y | 1121 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(), 1123 brw_set_src1(p, brw_last_inst, retype(brw_null_reg(), 1126 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), 1128 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(), 1143 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), 1145 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(), 1166 brw_set_src0(p, brw_last_inst, retype(brw_null_reg(), 1168 brw_set_src1(p, brw_last_inst, retype(brw_null_reg(), 1171 brw_set_dest(p, brw_last_inst, retype(brw_null_reg(), 1173 brw_set_src0(p, brw_last_inst, retype(brw_null_re [all...] |