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    Searched refs:sfn_log (Results 1 - 19 of 19) sorted by relevancy

  /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/
sfn_valuepool.cpp 80 sfn_log << SfnLog::reg << "Search " << (v.is_ssa ? "ssa_reg " : "reg ")
85 sfn_log << SfnLog::reg << " -> got index " << idx << "\n";
109 sfn_log << SfnLog::reg << " -> got index " << idx << "\n";
125 sfn_log << SfnLog::reg << "Unsupported bit size " << v.ssa->bit_size
203 sfn_log << SfnLog::reg << " LIDX:" << index;
222 sfn_log << SfnLog::reg << __func__ << ": ";
224 sfn_log << "ssa_" << v.ssa.index;
226 sfn_log << "r" << v.reg.reg->index;
227 sfn_log << " -> " << idx << "\n";
264 sfn_log << SfnLog::re
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sfn_debug.cpp 77 SfnLog sfn_log; member in namespace:r600
127 sfn_log << m_flag << std::string(" ", 2 * m_indention++)
133 sfn_log << m_flag << std::string(" ", 2 * m_indention--)
sfn_liverange.cpp 757 sfn_log << SfnLog::merge << "have " << temp_acc.size() << " temps\n";
780 sfn_log << SfnLog::merge << "Record " << *v.second << "\n";
783 sfn_log << SfnLog::merge << "Record INPUT write for "
789 sfn_log << SfnLog::merge << "Record KEEP ALIVE for "
814 sfn_log << SfnLog::merge << "Record read l:" << line << " reg:" << src << "\n";
832 sfn_log << SfnLog::merge << "Record write for "
867 sfn_log << SfnLog::merge << "== register live ranges ==========\n";
869 sfn_log << SfnLog::merge << setw(4) << i;
871 sfn_log << SfnLog::merge << ": [" << register_live_ranges[i].begin << ", "
874 sfn_log << SfnLog::merge << "==================================\n\n"
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sfn_shaderio.cpp 146 sfn_log << SfnLog::io << __func__
202 sfn_log << SfnLog::io
289 sfn_log << SfnLog::io << __func__ << " Don't set color_ioinfo\n";
296 sfn_log << SfnLog::io << __func__ << "name << " << name << " sid << " << sid << "\n";
305 sfn_log << SfnLog::io << __func__ << "name << " << _name << " sid << " << sid << "\n";
310 sfn_log << SfnLog::io << "Set back color index " << back_color_input_idx << "\n";
316 sfn_log << SfnLog::io << __func__ << " set color_ioinfo " << m_back_color_input_idx << "\n";
sfn_nir.cpp 101 sfn_log << SfnLog::trans << "Start TCS\n";
105 sfn_log << SfnLog::trans << "Start TESS_EVAL\n";
109 sfn_log << SfnLog::trans << "Start GS\n";
113 sfn_log << SfnLog::trans << "Start FS\n";
117 sfn_log << SfnLog::trans << "Start CS\n";
124 sfn_log << SfnLog::trans << "Process declarations\n";
131 sfn_log << SfnLog::trans << "Scan shader\n";
133 if (sfn_log.has_debug_flag(SfnLog::instr))
147 sfn_log << SfnLog::trans << "Reserve registers\n";
153 sfn_log << SfnLog::trans << "Allocate local registers\n"
    [all...]
sfn_instruction_base.cpp 112 sfn_log << SfnLog::merge << "REMAP " << *this << "\n";
124 sfn_log << SfnLog::merge << "TO " << *this << "\n\n";
156 sfn_log << SfnLog::merge << "Scan " << *this << "\n";
sfn_debug.h 118 extern SfnLog sfn_log;
sfn_shader_base.cpp 179 sfn_log << SfnLog::merge << "Input " << i << " gpr:" << sh_info.input[i].gpr
213 sfn_log << SfnLog::merge << "=========Mapping===========\n";
216 sfn_log << SfnLog::merge << "Map:" << i << " -> " << register_map[i].new_reg << "\n";
277 sfn_log << SfnLog::io << "HW_ATOMIC file count: "
315 sfn_log << SfnLog::io << "Add var deref:" << index
345 sfn_log << SfnLog::io << "Search for deref:" << index << "\n";
399 r600::sfn_log << SfnLog::instr << " as '" << *ir << "'\n";
427 sfn_log << SfnLog::err << "Jump instrunction " << *i << " not supported\n";
456 sfn_log << SfnLog::err << "End loop: Loop start for "
620 r600::sfn_log << SfnLog::instr << "emit '
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sfn_value_gpr.cpp 329 sfn_log << SfnLog::reg << "Create indirect register from " << *this;
334 sfn_log << SfnLog::reg << " -> " << *v;
337 sfn_log << SfnLog::reg << "[" << *indirect << "]";
346 sfn_log << SfnLog::reg << "(" << *v << ")";
353 sfn_log << SfnLog::reg <<" -> " << *v << "\n";
sfn_emittexinstruction.cpp 101 r600::sfn_log << SfnLog::instr << "emit '"
131 r600::sfn_log << SfnLog::instr << "emit '"
174 r600::sfn_log << SfnLog::instr << "emit '"
238 r600::sfn_log << SfnLog::instr << "emit '"
372 r600::sfn_log << SfnLog::instr << "emit '"
392 r600::sfn_log << SfnLog::tex << " really have offsets and they are " <<
433 r600::sfn_log << SfnLog::tex << "emit literal offsets\n";
450 r600::sfn_log << SfnLog::instr << "emit '"
527 sfn_log << SfnLog::tex << "Get Inputs with " << instr.coord_components << " components\n";
551 sfn_log << SfnLog::tex << "Get DDX "
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sfn_vertexstageexport.cpp 206 sfn_log << SfnLog::err << __func__ << "Unsupported location "
220 sfn_log << SfnLog::io << __func__ << ": emit DDL: " << store_info.driver_location << "\n";
398 sfn_log << SfnLog::instr << "Emit stream " << i
405 sfn_log << SfnLog::err << "\nERR: register index "
436 sfn_log << SfnLog::instr << *so_gpr[i] << "\n";
441 sfn_log << SfnLog::instr << "Write output buffer " << i
472 sfn_log << SfnLog::io << "check output " << store_info.driver_location
476 sfn_log << SfnLog::io << " against " << k << " name=" << in_io.name<< " sid=" << in_io.sid << "\n";
492 sfn_log << SfnLog::err << "VS defines output at "
sfn_conditionaljumptracker.cpp 129 sfn_log << "Jump stack empty\n";
136 sfn_log << "Loop jump stack empty\n";
sfn_shader_fragment.cpp 100 sfn_log << SfnLog::io << "Parse " << instr->instr
290 sfn_log << SfnLog::io << "Interpolator " << i << " test enabled\n";
302 sfn_log << SfnLog::io << "Interpolator " << i << " is enabled with ij=" << num_baryc <<" \n";
335 sfn_log << SfnLog::io << "Set front_face register to " << *m_front_face_reg << "\n";
348 sfn_log << SfnLog::io << "Set sample mask in register to " << *m_sample_mask_reg << "\n";
360 sfn_log << SfnLog::io << "Set sample id register to " << *m_sample_id_reg << "\n";
539 sfn_log << SfnLog::err << "r600-NIR: Unimplemented store_output for " << location << ")\n";
807 sfn_log << SfnLog::io << "Using Interpolator (" << *ip.j << ", " << *ip.i << ")" << "\n";
947 sfn_log << SfnLog::io << "Pixel output at loc:" << location << "\n";
950 sfn_log << SfnLog::io << "Pixel output loc:" << locatio
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sfn_emitaluinstruction.cpp 47 r600::sfn_log << SfnLog::instr << "emit '"
219 sfn_log << SfnLog::reg << "Preload:\n";
223 sfn_log << SfnLog::reg << " " << *m_src[i][c];
226 sfn_log << SfnLog::reg << "\n";
230 sfn_log << SfnLog::reg << " extra:" << *m_src[1][3] << "\n";
314 sfn_log << SfnLog::reg << "Split test " << *src;
319 sfn_log << SfnLog::reg << " is constant " << i;
321 sfn_log << SfnLog::reg << "\n";
329 sfn_log << SfnLog::reg << "split " << nconst << " constants, sel[0] = " << sel; ;
332 sfn_log << "sel[" << i << "] = " << c[i]->sel() << "\n"
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sfn_shader_vertex.cpp 68 sfn_log << SfnLog::trans << "Start VS for GS\n";
sfn_ir_to_assembly.cpp 170 sfn_log << SfnLog::assembly << "Emit from '" << *i << "\n";
206 sfn_log << SfnLog::assembly << " Prepare " << *addr << " to address register\n";
246 sfn_log << SfnLog::assembly << " Have " << m_nliterals_in_group.size() << " inject a last op (nop)\n";
324 sfn_log << SfnLog::assembly << " Current address register is " << *m_last_addr << "\n";
327 sfn_log << SfnLog::assembly << " Current dst register is " << *dst << "\n";
331 sfn_log << SfnLog::assembly << " Clear address register (was " << *m_last_addr << "\n";
1097 sfn_log << SfnLog::assembly << " mova_int, ";
1107 sfn_log << SfnLog::assembly << "op1_set_cf_idx" << idx;
1119 sfn_log << SfnLog::assembly << " mova_int, ";
1129 sfn_log << SfnLog::assembly << "\n"
    [all...]
sfn_shader_base.h 55 extern SfnLog sfn_log;
sfn_instruction_export.cpp 187 sfn_log << SfnLog::merge << "Remap " << *m_address << " of type " << m_address->type() << "\n";
sfn_shader_geometry.cpp 318 sfn_log << SfnLog::err << "GS: Indirect input addressing not (yet) supported\n";

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