| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/lima/ir/gp/ |
| value_regalloc.c | 31 gpir_node *spill = NULL; local
36 /* spill farest node */
37 if (!spill ||
38 spill->vreg.last->vreg.index < active[i]->vreg.last->vreg.index) {
39 spill = active[i];
43 assert(spill);
44 gpir_debug("value regalloc spill node %d for value reg %d\n",
45 spill->index, spill->value_reg);
48 gpir_store_node *store = gpir_node_create(spill->block, gpir_op_store_reg)
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| ir3_lower_spill.c | 42 split_spill(struct ir3_instruction *spill)
44 unsigned orig_components = spill->srcs[2]->uim_val;
47 assert(spill->deps_count == 0);
50 if (spill->srcs[1]->flags & IR3_REG_ARRAY) {
51 spill->srcs[1]->wrmask = MASK(orig_components);
52 spill->srcs[1]->num = spill->srcs[1]->array.base;
53 spill->srcs[1]->flags &= ~IR3_REG_ARRAY;
60 struct ir3_instruction *clone = ir3_instr_clone(spill);
61 ir3_instr_move_before(clone, spill);
[all...] |
| ir3_spill.c | 91 * This map only contains values which we didn't spill, so it also serves as
110 /* rb tree of live intervals that we can spill, ordered by next-use distance.
112 * case. We use this list to determine what to spill.
656 spill(struct ra_spill_ctx *ctx, const struct reg_or_immed *val, function
674 struct ir3_instruction *spill = local
676 ir3_src_create(spill, INVALID_REG, ctx->base_reg->flags)->def = ctx->base_reg;
680 struct ir3_register *src = ir3_src_create(spill, INVALID_REG, src_flags);
681 ir3_src_create(spill, INVALID_REG, IR3_REG_IMMED)->uim_val = elems;
682 spill->cat6.dst_offset = spill_slot;
683 spill->cat6.type = (reg->flags & IR3_REG_HALF) ? TYPE_U16 : TYPE_U32
[all...] |
| disasm-a3xx.c | 351 OPC(6, OPC_SPILL_MACRO, spill.macro),
|
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| aco_spill.cpp | 664 bool spill = !remat; local
669 spill = false;
674 spill = false;
681 spill = true;
684 if (spill) {
700 bool spill = true; local
710 spill = false;
714 if (spill) {
854 /* iterate the phi nodes for which operands to spill at the predecessor */
908 aco_ptr<Pseudo_instruction> spill{
[all...] |
| aco_interface.cpp | 124 aco::spill(program.get(), live_vars);
|
| aco_ir.h | 2172 void spill(Program* program, live& live_vars);
|
| /xsrc/external/mit/MesaLib/dist/src/broadcom/vulkan/ |
| v3dv_uniforms.c | 565 assert(pipeline->spill.bo);
566 cl_aligned_u32(&uniforms, pipeline->spill.bo->offset);
570 assert(pipeline->spill.size_per_thread > 0);
571 cl_aligned_u32(&uniforms, pipeline->spill.size_per_thread);
602 if (pipeline->spill.bo)
603 v3dv_job_add_bo(job, pipeline->spill.bo);
|
| v3dv_pipeline.c | 154 if (pipeline->spill.bo) {
155 assert(pipeline->spill.size_per_thread > 0);
156 v3dv_bo_free(device, pipeline->spill.bo);
1522 /* Checks that the pipeline has enough spill size to use for any of their
1550 if (pipeline->spill.bo) {
1551 assert(pipeline->spill.size_per_thread > 0);
1552 v3dv_bo_free(device, pipeline->spill.bo);
1554 pipeline->spill.bo =
1555 v3dv_bo_alloc(device, total_spill_size, "spill", true);
1556 pipeline->spill.size_per_thread = max_spill_size
[all...] |
| v3dv_private.h | 1767 } spill; member in struct:v3dv_pipeline
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_ra.cpp | 370 void spill(Instruction *defi, Value *slot, LValue *);
871 SpillCodeInserter& spill; member in class:nv50_ir::GCRA
1213 GCRA::GCRA(Function *fn, SpillCodeInserter& spill, MergedDefs& mergedDefs) :
1218 spill(spill),
1369 (node->degree < node->degreeLimit) ? "" : "(spill)");
1388 // Spill candidate. First go through the ones with the highest max
1400 ERROR("no viable spill candidates left\n");
1502 INFO_DBG(prog->dbgFlags, REG_ALLOC, "must spill: %%%i (size %u)\n",
1506 slot = spill.assignSlot(node->livei, lval->reg.size)
1704 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter
[all...] |
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| nv50_ir_ra.cpp | 325 void spill(Instruction *defi, Value *slot, LValue *);
828 SpillCodeInserter& spill; member in class:nv50_ir::GCRA
1166 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
1169 spill(spill)
1320 (node->degree < node->degreeLimit) ? "" : "(spill)");
1339 // Spill candidate. First go through the ones with the highest max
1351 ERROR("no viable spill candidates left\n");
1453 INFO_DBG(prog->dbgFlags, REG_ALLOC, "must spill: %%%i (size %u)\n",
1457 slot = spill.assignSlot(node->livei, lval->reg.size)
1658 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval) function in class:nv50_ir::SpillCodeInserter
[all...] |
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/lib/ |
| gk104.asm | 797 // spill control flow stack to l[]
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/lib/ |
| gk104.asm | 797 // spill control flow stack to l[]
|
