| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| aco_instruction_selection.cpp | 884 Temp src11 = bld.tmp(v1);
885 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
887 Temp hi = bld.vop2(op, bld.def(v1), src01, src11);
1772 Temp src11 = bld.tmp(dst.type(), 1);
1773 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
1779 Temp dst1 = bld.sop2(aco_opcode::s_addc_u32, bld.def(s1), bld.def(s1, scc), src01, src11,
1785 Temp dst1 = bld.vadd32(bld.def(v1), src01, src11, false, carry);
1852 Temp src11 = bld.tmp(dst.type(), 1);
1853 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
1857 carry = bld.sop2(aco_opcode::s_addc_u32, bld.def(s1), bld.scc(bld.def(s1)), src01, src11,
[all...] |
| /xsrc/external/mit/MesaLib/src/compiler/nir/ |
| nir_constant_expressions.c | 49159 const struct uint1_vec src11 = { local
49540 const struct uint8_vec src11 = { local
49905 const struct uint16_vec src11 = { local
50270 const struct uint32_vec src11 = { local
50635 const struct uint64_vec src11 = { local
[all...] |
| nir_builder_opcodes.h | 2089 nir_vec16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3, nir_ssa_def *src4, nir_ssa_def *src5, nir_ssa_def *src6, nir_ssa_def *src7, nir_ssa_def *src8, nir_ssa_def *src9, nir_ssa_def *src10, nir_ssa_def *src11, nir_ssa_def *src12, nir_ssa_def *src13, nir_ssa_def *src14, nir_ssa_def *src15)
2091 nir_ssa_def *srcs[16] = {src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11, src12, src13, src14, src15};
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