Searched refs:src_layout (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/panfrost/vulkan/
H A Dpanvk_vX_descriptor_set.c308 const struct panvk_descriptor_set_layout *src_layout = dest_set->layout; local in function:panvk_copy_descriptor_set
315 while (desc_count && src_binding < src_layout->binding_count &&
318 &src_layout->bindings[dest_binding];
327 &src_layout->bindings[src_binding];
/xsrc/external/mit/MesaLib.old/dist/src/intel/blorp/
H A Dblorp_priv.h247 enum isl_msaa_layout src_layout; member in struct:brw_blorp_blit_prog_key
H A Dblorp_blit.c1216 assert((key->src_layout == ISL_MSAA_LAYOUT_NONE) ==
1329 key->tex_layout != key->src_layout) {
1331 key->src_layout);
1363 assert(key->tex_layout == key->src_layout);
1379 assert(key->tex_layout == key->src_layout);
1806 /* src_layout and dst_layout indicate the true MSAA layout used by src and
1809 wm_prog_key->src_layout = params->src.surf.msaa_layout;
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A Danv_descriptor_set.c1685 const struct anv_descriptor_set_binding_layout *src_layout = local in function:anv_UpdateDescriptorSets
1688 &src->descriptors[src_layout->descriptor_index];
1697 if (src_layout->data & ANV_DESCRIPTOR_INLINE_UNIFORM) {
1698 assert(src_layout->data == ANV_DESCRIPTOR_INLINE_UNIFORM);
1701 src->desc_mem.map + src_layout->descriptor_offset +
1709 &src->buffer_views[src_layout->buffer_view_index +
1717 if (src_layout->data & ANV_DESCRIPTOR_BUFFER_VIEW) {
1736 unsigned desc_size = anv_descriptor_size(src_layout);
1741 src->desc_mem.map + src_layout->descriptor_offset +
/xsrc/external/mit/MesaLib/dist/src/intel/blorp/
H A Dblorp_priv.h293 enum isl_msaa_layout src_layout; member in struct:brw_blorp_blit_prog_key
H A Dblorp_blit.c1199 assert((key->src_layout == ISL_MSAA_LAYOUT_NONE) ==
1326 key->tex_layout != key->src_layout) {
1328 key->src_layout);
1360 assert(key->tex_layout == key->src_layout);
1376 assert(key->tex_layout == key->src_layout);
1932 /* src_layout and dst_layout indicate the true MSAA layout used by src and
1935 key->src_layout = params->src.surf.msaa_layout;
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A Danv_descriptor_set.c1438 const struct anv_descriptor_set_binding_layout *src_layout = local in function:anv_UpdateDescriptorSets
1441 &src->descriptors[src_layout->descriptor_index];
1453 if (src_layout->data & ANV_DESCRIPTOR_INLINE_UNIFORM) {
1454 assert(src_layout->data == ANV_DESCRIPTOR_INLINE_UNIFORM);
1457 src->desc_mem.map + src_layout->descriptor_offset +
1461 unsigned desc_size = anv_descriptor_size(src_layout);
1466 src->desc_mem.map + src_layout->descriptor_offset +
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c56 VkImageLayout src_layout,
4474 VkImageLayout src_layout,
4483 if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
4492 } else if (!radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
4496 } else if (radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
4566 VkImageLayout src_layout,
4613 VkImageLayout src_layout,
4619 if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
4621 src_layout, dst_layout,
4627 if (src_layout
4472 radv_handle_depth_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,VkImageLayout dst_layout,unsigned src_queue_mask,unsigned dst_queue_mask,const VkImageSubresourceRange * range) argument
4564 radv_init_color_image_metadata(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,VkImageLayout dst_layout,unsigned src_queue_mask,unsigned dst_queue_mask) argument
4611 radv_handle_color_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,VkImageLayout dst_layout,unsigned src_queue_mask,unsigned dst_queue_mask,const VkImageSubresourceRange * range) argument
4651 radv_handle_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,VkImageLayout dst_layout,uint32_t src_family,uint32_t dst_family,const VkImageSubresourceRange * range) argument
[all...]
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c60 struct radv_image *image, VkImageLayout src_layout,
7353 VkImageLayout src_layout, bool src_render_loop,
7364 if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
7366 } else if (!radv_layout_is_htile_compressed(device, image, src_layout, src_render_loop,
7371 } else if (radv_layout_is_htile_compressed(device, image, src_layout, src_render_loop,
7458 VkImageLayout src_layout, bool src_render_loop,
7521 VkImageLayout src_layout, VkImageLayout dst_layout, unsigned dst_queue_mask)
7523 if (src_layout != VK_IMAGE_LAYOUT_PRESENT_SRC_KHR &&
7541 VkImageLayout src_layout, bool src_render_loop,
7552 if (src_layout
7352 radv_handle_depth_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,bool src_render_loop,VkImageLayout dst_layout,bool dst_render_loop,unsigned src_queue_mask,unsigned dst_queue_mask,const VkImageSubresourceRange * range,struct radv_sample_locations_state * sample_locs) argument
7457 radv_init_color_image_metadata(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,bool src_render_loop,VkImageLayout dst_layout,bool dst_render_loop,unsigned src_queue_mask,unsigned dst_queue_mask,const VkImageSubresourceRange * range) argument
7520 radv_retile_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,VkImageLayout dst_layout,unsigned dst_queue_mask) argument
7540 radv_handle_color_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,bool src_render_loop,VkImageLayout dst_layout,bool dst_render_loop,unsigned src_queue_mask,unsigned dst_queue_mask,const VkImageSubresourceRange * range) argument
7619 radv_handle_image_transition(struct radv_cmd_buffer * cmd_buffer,struct radv_image * image,VkImageLayout src_layout,bool src_render_loop,VkImageLayout dst_layout,bool dst_render_loop,uint32_t src_family,uint32_t dst_family,const VkImageSubresourceRange * range,struct radv_sample_locations_state * sample_locs) argument
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/frontends/lavapipe/
H A Dlvp_descriptor_set.c463 const struct lvp_descriptor_set_binding_layout *src_layout = local in function:lvp_UpdateDescriptorSets
466 &src->descriptors[src_layout->descriptor_index];

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