Searched refs:stack_entry_size (Results 1 - 9 of 9) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/sb/
H A Dsb_context.cpp72 stack_entry_size = 8;
81 stack_entry_size = 8;
85 stack_entry_size = 4;
H A Dsb_bc_finalize.cpp270 unsigned dmod1 = elems % ctx.stack_entry_size;
271 unsigned dmod2 = (elems + 1) % ctx.stack_entry_size;
909 stack_elements += (loops * ctx.stack_entry_size) + ifs;
H A Dsb_bc.h647 unsigned stack_entry_size; member in class:r600_sb::sb_context
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sb/
H A Dsb_context.cpp72 stack_entry_size = 8;
81 stack_entry_size = 8;
85 stack_entry_size = 4;
H A Dsb_bc.h681 unsigned stack_entry_size; member in class:r600_sb::sb_context
700 stack_entry_size(0) {}
H A Dsb_bc_finalize.cpp270 unsigned dmod1 = elems % ctx.stack_entry_size;
271 unsigned dmod2 = (elems + 1) % ctx.stack_entry_size;
909 stack_elements += (loops * ctx.stack_entry_size) + ifs;
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_pipeline_rt.c1796 unsigned stack_entry_size = 4; local in function:insert_traversal
1799 unsigned stack_entry_stride = stack_entry_size * lanes;
1803 nir_imul(b, nir_load_subgroup_invocation(b), nir_imm_int(b, stack_entry_size)));
1849 .align_mul = stack_entry_size, .align_offset = 0);
1875 .align_mul = stack_entry_size, .align_offset = 0);
1935 .align_mul = stack_entry_size, .align_offset = 0);
1974 .write_mask = 0x1, .align_mul = stack_entry_size,
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600_asm.c105 static unsigned stack_entry_size(enum radeon_family chip) { function in typeref:typename:unsigned
161 bc->stack.entry_size = stack_entry_size(family);
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_asm.c105 static unsigned stack_entry_size(enum radeon_family chip) { function in typeref:typename:unsigned
161 bc->stack.entry_size = stack_entry_size(family);

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