Searched refs:train_set (Results 1 - 1 of 1) sorted by relevance
| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | atombios_output.c | 2556 uint8_t train_set[4])
2593 train_set[lane] = v | p;
2625 static void dp_update_dpvs_emph(xf86OutputPtr output, uint8_t train_set[4]) argument
2630 atombios_output_dig_transmitter_setup(output, ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH, i, train_set[i]);
2632 atom_dp_aux_native_write(output, DP_TRAINING_LANE0_SET, radeon_output->dp_lane_count, train_set);
2644 uint8_t train_set[4]; local in function:do_displayport_link_train
2649 memset(train_set, 0, 4);
2690 dp_update_dpvs_emph(output, train_set);
2707 if ((train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)
2716 if ((train_set[
2553 dp_get_adjust_train(xf86OutputPtr output,uint8_t link_status[DP_LINK_STATUS_SIZE],int lane_count,uint8_t train_set[4]) argument
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