Searched refs:user_data_0 (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c592 uint32_t base_reg = pipeline->user_data_0[stage];
610 uint32_t sh_base = pipeline->user_data_0[stage];
642 uint32_t base_reg = pipeline->user_data_0[stage];
2063 base_reg = pipeline->user_data_0[stage];
3563 uint32_t base_reg = pipeline->user_data_0[stage];
H A Dradv_private.h1388 uint32_t user_data_0[MESA_SHADER_STAGES]; member in struct:radv_pipeline
H A Dradv_pipeline.c3779 pipeline->user_data_0[i] = radv_pipeline_stage_to_user_data_0(pipeline, i, device->physical_device->rad_info.chip_class);
3784 pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
3955 pipeline->user_data_0[MESA_SHADER_COMPUTE] = radv_pipeline_stage_to_user_data_0(pipeline, MESA_SHADER_COMPUTE, device->physical_device->rad_info.chip_class);
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c792 uint32_t base_reg = pipeline->user_data_0[stage];
809 uint32_t sh_base = pipeline->user_data_0[stage];
1014 uint32_t base_reg = pipeline->user_data_0[stage];
2963 uint32_t base_reg = cmd_buffer->state.pipeline->user_data_0[MESA_SHADER_VERTEX];
3479 base_reg = pipeline->user_data_0[stage];
3583 base_reg = pipeline->user_data_0[MESA_SHADER_GEOMETRY];
5929 uint32_t base_reg = pipeline->user_data_0[stage];
6457 const uint32_t base_reg = pipeline->user_data_0[stage];
7203 base_reg = pipeline->user_data_0[MESA_SHADER_COMPUTE];
H A Dradv_pipeline.c5456 pipeline->user_data_0[i] = radv_pipeline_stage_to_user_data_0(
5468 pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
5792 pipeline->user_data_0[MESA_SHADER_COMPUTE] = radv_pipeline_stage_to_user_data_0(
H A Dradv_private.h1792 uint32_t user_data_0[MESA_SHADER_STAGES]; member in struct:radv_pipeline

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