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    Searched refs:vPos (Results 1 - 7 of 7) sorted by relevancy

  /xsrc/external/mit/xf86-video-ati/dist/src/
radeon_tv.c 609 /* Compute F,V,H restarts from default restart position and hPos & vPos
689 * Convert vPos TV lines to n. of CRTC pixels
696 vOffset = ((int)(vTotal * hTotal) * 2 * tvout->vPos) / (int)(NTSC_TV_LINES_PER_FRAME);
698 vOffset = ((int)(vTotal * hTotal) * 2 * tvout->vPos) / (int)(PAL_TV_LINES_PER_FRAME);
703 constPtr->defRestart , tvout->hPos , tvout->vPos , p1 , p2 , restart);
radeon_probe.h 254 int vPos;
radeon_output.c 1820 tvout->vPos = val;
2092 tvout->vPos = 0;
  /xsrc/external/mit/MesaLib/dist/src/gallium/frontends/nine/
nine_ff.c 1511 struct ureg_src vPos;
1514 vPos = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
1516 vPos = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0,
1531 ureg_MOV(ureg, rFog, _ZZZZ(vPos));
1534 ureg_RCP(ureg, rFog, _WWWW(vPos));
nine_shader.c 474 struct ureg_src vPos;
1145 if (ureg_src_is_undef(tx->regs.vPos))
1146 tx->regs.vPos = nine_get_position_input(tx);
1150 ureg_ADD(ureg, wpos, tx->regs.vPos,
1154 src = tx->regs.vPos;
2318 /* Position0 is forbidden (likely because vPos already does that) */
3600 tx->regs.vPos = ureg_src_undef();
  /xsrc/external/mit/MesaLib.old/dist/src/gallium/state_trackers/nine/
nine_ff.c 1505 struct ureg_src vPos;
1508 vPos = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
1510 vPos = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0,
1525 ureg_MOV(ureg, rFog, _ZZZZ(vPos));
1528 ureg_RCP(ureg, rFog, _WWWW(vPos));
nine_shader.c 473 struct ureg_src vPos;
1124 if (ureg_src_is_undef(tx->regs.vPos))
1125 tx->regs.vPos = nine_get_position_input(tx);
1129 ureg_ADD(ureg, wpos, tx->regs.vPos,
1133 src = tx->regs.vPos;
2291 /* Position0 is forbidden (likely because vPos already does that) */
3565 tx->regs.vPos = ureg_src_undef();

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