Searched refs:vtx_base_sgpr (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_cmd_buffer.c4892 cmd_buffer->state.pipeline->graphics.vtx_base_sgpr != pipeline->graphics.vtx_base_sgpr;
5982 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr;
6032 radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr,
6072 radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr, 1 + !!drawid);
6107 radeon_set_sh_reg(cs, state->pipeline->graphics.vtx_base_sgpr + sizeof(uint32_t), i);
6134 radeon_set_sh_reg(cs, state->pipeline->graphics.vtx_base_sgpr + sizeof(uint32_t), i);
6649 assert(state->pipeline->graphics.vtx_base_sgpr);
H A Dradv_private.h1801 uint32_t vtx_base_sgpr; member in struct:radv_pipeline::__anon4674665a290a::__anon4674665a2a08
H A Dradv_pipeline.c5468 pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
5469 pipeline->graphics.vtx_base_sgpr += loc->sgpr_idx * 4;
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_private.h1396 uint32_t vtx_base_sgpr; member in struct:radv_pipeline::__anone2cea0a71a0a::__anone2cea0a71b08
H A Dradv_cmd_buffer.c3611 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr;
3693 assert(state->pipeline->graphics.vtx_base_sgpr);
3697 radeon_set_sh_reg_seq(cs, state->pipeline->graphics.vtx_base_sgpr,
H A Dradv_pipeline.c3784 pipeline->graphics.vtx_base_sgpr = pipeline->user_data_0[MESA_SHADER_VERTEX];
3785 pipeline->graphics.vtx_base_sgpr += loc->sgpr_idx * 4;

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