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    Searched defs:DefClass (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetSchedule.cpp 198 unsigned DefClass = DefMI->getDesc().getSchedClass();
199 OperLatency = InstrItins.getOperandCycle(DefClass, DefOperIdx);
TargetInstrInfo.cpp 1098 unsigned DefClass = get(DefNode->getMachineOpcode()).getSchedClass();
1100 return ItinData->getOperandCycle(DefClass, DefIdx);
1102 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
1169 unsigned DefClass = DefMI.getDesc().getSchedClass();
1170 int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
1262 unsigned DefClass = DefMI.getDesc().getSchedClass();
1264 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCInstrInfo.cpp 150 unsigned DefClass = MI.getDesc().getSchedClass();
156 int Cycle = ItinData->getOperandCycle(DefClass, i);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 3843 unsigned DefClass,
3848 return ItinData->getOperandCycle(DefClass, DefIdx);
3884 unsigned DefClass,
3889 return ItinData->getOperandCycle(DefClass, DefIdx);
3991 unsigned DefClass = DefMCID.getSchedClass();
3995 return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
4004 DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
4013 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign);
4034 DefCycle = getLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign);
4085 if (ItinData->hasPipelineForwarding(DefClass, DefMCID.getNumOperands()-1
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