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    Searched defs:DemandedBits (Results 1 - 10 of 10) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
DemandedBits.h 1 //===- llvm/Analysis/DemandedBits.h - Determine demanded bits ---*- C++ -*-===//
40 class DemandedBits {
42 DemandedBits(Function &F, AssumptionCache &AC, DominatorTree &DT) :
101 mutable Optional<DemandedBits> DB;
114 DemandedBits &getDemandedBits() { return *DB; }
119 /// An analysis that produces \c DemandedBits for a function.
127 using Result = DemandedBits;
131 DemandedBits run(Function &F, FunctionAnalysisManager &AM);
134 /// Printer pass for DemandedBits
DemandedBits.h 1 //===- llvm/Analysis/DemandedBits.h - Determine demanded bits ---*- C++ -*-===//
40 class DemandedBits {
42 DemandedBits(Function &F, AssumptionCache &AC, DominatorTree &DT) :
101 mutable Optional<DemandedBits> DB;
114 DemandedBits &getDemandedBits() { return *DB; }
119 /// An analysis that produces \c DemandedBits for a function.
127 using Result = DemandedBits;
131 DemandedBits run(Function &F, FunctionAnalysisManager &AM);
134 /// Printer pass for DemandedBits
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 504 const APInt &DemandedBits,
511 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO))
527 if (Opcode == ISD::XOR && DemandedBits.isSubsetOf(C))
530 if (!C.isSubsetOf(DemandedBits)) {
532 SDValue NewC = TLO.DAG.getConstant(DemandedBits & C, DL, VT);
545 const APInt &DemandedBits,
551 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO);
601 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
608 bool Simplified = SimplifyDemandedBits(Op, DemandedBits, Known, TLO);
616 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
    [all...]
TargetLowering.cpp 504 const APInt &DemandedBits,
511 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO))
527 if (Opcode == ISD::XOR && DemandedBits.isSubsetOf(C))
530 if (!C.isSubsetOf(DemandedBits)) {
532 SDValue NewC = TLO.DAG.getConstant(DemandedBits & C, DL, VT);
545 const APInt &DemandedBits,
551 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO);
601 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
608 bool Simplified = SimplifyDemandedBits(Op, DemandedBits, Known, TLO);
616 bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
    [all...]
DAGCombiner.cpp 322 APInt DemandedBits = APInt::getAllOnesValue(BitWidth);
323 return SimplifyDemandedBits(Op, DemandedBits);
326 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits) {
329 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, Known, TLO, 0, false))
352 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
1158 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
1163 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, 0,
18684 APInt DemandedBits = APInt::getAllOnesValue(VecEltBitWidth);
18685 if (SimplifyDemandedBits(VecOp, DemandedBits, DemandedElts, true)) {
DAGCombiner.cpp 322 APInt DemandedBits = APInt::getAllOnesValue(BitWidth);
323 return SimplifyDemandedBits(Op, DemandedBits);
326 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits) {
329 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, Known, TLO, 0, false))
352 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
1158 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
1163 if (!TLI.SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, 0,
18684 APInt DemandedBits = APInt::getAllOnesValue(VecEltBitWidth);
18685 if (SimplifyDemandedBits(VecOp, DemandedBits, DemandedElts, true)) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIISelLowering.cpp 10791 APInt DemandedBits = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8);
10792 if (TLI.SimplifyDemandedBits(Src, DemandedBits, DCI)) {
10802 TLI.SimplifyMultipleUseDemandedBits(Src, DemandedBits, DAG))
SIISelLowering.cpp 10791 APInt DemandedBits = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8);
10792 if (TLI.SimplifyDemandedBits(Src, DemandedBits, DCI)) {
10802 TLI.SimplifyMultipleUseDemandedBits(Src, DemandedBits, DAG))
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 1563 uint64_t DemandedBits = Demanded.getZExtValue();
1566 Imm &= DemandedBits;
1576 uint64_t NonDemandedBits = ~DemandedBits;
1577 uint64_t InvertedImm = ~Imm & DemandedBits;
1598 uint64_t Hi = Imm >> EltSize, DemandedBitsHi = DemandedBits >> EltSize;
1601 if (((Imm ^ Hi) & (DemandedBits & DemandedBitsHi) & Mask) != 0)
1604 // Merge the upper and lower halves of Imm and DemandedBits.
1606 DemandedBits |= DemandedBitsHi;
1645 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
1663 if (DemandedBits.countPopulation() == Size
    [all...]
AArch64ISelLowering.cpp 1563 uint64_t DemandedBits = Demanded.getZExtValue();
1566 Imm &= DemandedBits;
1576 uint64_t NonDemandedBits = ~DemandedBits;
1577 uint64_t InvertedImm = ~Imm & DemandedBits;
1598 uint64_t Hi = Imm >> EltSize, DemandedBitsHi = DemandedBits >> EltSize;
1601 if (((Imm ^ Hi) & (DemandedBits & DemandedBitsHi) & Mask) != 0)
1604 // Merge the upper and lower halves of Imm and DemandedBits.
1606 DemandedBits |= DemandedBitsHi;
1645 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
1663 if (DemandedBits.countPopulation() == Size
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