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    Searched defs:Divergent (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SILowerI1Copies.cpp 167 // If this block has a divergent terminator and the def block is its
169 bool Divergent = false;
175 Divergent = true;
180 if (Divergent && PDT.dominates(&DefBlock, MBB))
230 /// B has a divergent branch (since by default we will compile this code such
239 /// relevant branches are actually divergent.
SILowerI1Copies.cpp 167 // If this block has a divergent terminator and the def block is its
169 bool Divergent = false;
175 Divergent = true;
180 if (Divergent && PDT.dominates(&DefBlock, MBB))
230 /// B has a divergent branch (since by default we will compile this code such
239 /// relevant branches are actually divergent.
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMLowOverheadLoops.cpp 1491 // we come across the divergent vpr def.
1493 // the divergent vpr def.
1494 MachineInstr *Divergent = VPTState::getDivergent(Block);
1495 MachineBasicBlock *MBB = Divergent->getParent();
1496 auto DivergentNext = ++MachineBasicBlock::iterator(Divergent);
1509 // with the VPST This should be the divergent instruction
1511 VCMPOpcodeToVPT(Divergent->getOpcode()) != 0 ? Divergent : nullptr;
1514 // Insert a VPST at the divergent only if the next instruction
1521 BuildMI(*Divergent->getParent(), Divergent
    [all...]
ARMLowOverheadLoops.cpp 1491 // we come across the divergent vpr def.
1493 // the divergent vpr def.
1494 MachineInstr *Divergent = VPTState::getDivergent(Block);
1495 MachineBasicBlock *MBB = Divergent->getParent();
1496 auto DivergentNext = ++MachineBasicBlock::iterator(Divergent);
1509 // with the VPST This should be the divergent instruction
1511 VCMPOpcodeToVPT(Divergent->getOpcode()) != 0 ? Divergent : nullptr;
1514 // Insert a VPST at the divergent only if the next instruction
1521 BuildMI(*Divergent->getParent(), Divergent
    [all...]

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