| /src/sys/external/bsd/compiler_rt/dist/lib/xray/ |
| xray_powerpc64.cc | 34 const intptr_t Mask = ~(LineSize - 1);
35 const intptr_t StartLine = ((intptr_t)Addr) & Mask;
36 const intptr_t EndLine = ((intptr_t)Addr + Len + LineSize - 1) & Mask;
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| /src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| SanitizerSpecialCaseList.h | 42 // Query ignorelisted entries if any bit in Mask matches the entry's section.
43 bool inSection(SanitizerMask Mask, StringRef Prefix, StringRef Query,
52 : Mask(SM), Entries(E){};
54 SanitizerMask Mask;
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| XRayInstr.h | 50 return Mask & K;
53 bool hasOneOf(XRayInstrMask K) const { return Mask & K; }
56 Mask = Value ? (Mask | K) : (Mask & ~K);
59 void clear(XRayInstrMask K = XRayInstrKind::All) { Mask &= ~K; }
61 bool empty() const { return Mask == 0; }
63 bool full() const { return Mask == XRayInstrKind::All; }
65 XRayInstrMask Mask = 0;
68 /// Parses a command line argument into a mask
[all...] |
| Sanitizers.h | 37 /// Mask value initialized to 0.
39 /// Number of bits in a mask.
41 /// Number of bits in a mask element.
54 /// Create a mask with a bit enabled at position Pos.
156 return static_cast<bool>(Mask & K);
160 bool hasOneOf(SanitizerMask K) const { return static_cast<bool>(Mask & K); }
165 Mask = Value ? (Mask | K) : (Mask & ~K);
169 void clear(SanitizerMask K = SanitizerKind::All) { Mask &= ~K;
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/Basic/ |
| SanitizerSpecialCaseList.cpp | 41 SanitizerMask Mask;
45 Mask |= SanitizerKind::ID;
52 SanitizerSections.emplace_back(Mask, S.Entries);
56 bool SanitizerSpecialCaseList::inSection(SanitizerMask Mask, StringRef Prefix,
60 if ((S.Mask & Mask) &&
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| /src/external/apache2/llvm/dist/clang/include/clang/AST/ |
| DeclAccessPair.h | 32 enum { Mask = 0x3 };
42 return reinterpret_cast<NamedDecl*>(~Mask & Ptr);
45 return AccessSpecifier(Mask & Ptr);
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| /src/external/apache2/llvm/dist/clang/lib/Driver/ |
| XRayArgs.cpp | 114 InstrumentationBundle.Mask = XRayInstrKind::All;
132 auto Mask = parseXRayInstrValue(P);
133 if (Mask == XRayInstrKind::None) {
138 InstrumentationBundle.Mask |= Mask;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUArgumentUsageInfo.cpp | 40 llvm::write_hex(OS, Mask, llvm::HexPrintStyle::PrefixLower);
166 const unsigned Mask = 0x3ff;
167 AI.WorkItemIDX = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask);
168 AI.WorkItemIDY = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask << 10);
169 AI.WorkItemIDZ = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask << 20);
|
| SIRegisterInfo.h | 40 /// all elements of the inner vector combined give a full lane mask.
311 uint64_t Mask = LM.getAsInteger();
312 uint64_t Even = Mask & 0xAAAAAAAAAAAAAAAAULL;
313 Mask = (Even >> 1) | Mask;
314 uint64_t Odd = Mask & 0x5555555555555555ULL;
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-readobj/ |
| ARMWinEHPrinter.h | 30 uint8_t Mask;
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ADT/ |
| BitmaskEnum.h | 80 template <typename E> std::underlying_type_t<E> Mask() {
82 // subtracting 1 gives us the mask with all bits set, like we want.
93 assert(U <= Mask<E>() && "Enum value too large (or largest val too small?)");
103 return static_cast<E>(~Underlying(Val) & Mask<E>());
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| StackMapLivenessAnalysis.cpp | 79 /// Create a register mask and initialize it with the registers from
154 uint32_t *Mask = createRegisterMask(MF);
155 MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask);
159 /// Create a register mask and initialize it with the registers from the
162 // The mask is owned and cleaned up by the Machine Function.
163 uint32_t *Mask = MF.allocateRegMask();
165 Mask[Reg / 32] |= 1U << (Reg % 32);
167 // Give the target a chance to adjust the mask.
168 TRI->adjustStackMapLiveOutMask(Mask);
170 return Mask;
[all...] |
| LivePhysRegs.cpp | 28 /// mask.
156 LaneBitmask Mask = LI.LaneMask;
158 assert(Mask.any() && "Invalid livein mask");
159 if (Mask.all() || !S.isValid()) {
165 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
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| LiveRegMatrix.cpp | 86 LaneBitmask Mask = (*Units).second;
88 if ((S.LaneMask & Mask).any()) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiAsmBackend.cpp | 112 uint64_t Mask =
114 CurVal |= Value & Mask;
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| SerialSnippetGenerator.cpp | 22 ExecutionMode Mask;
168 for (const auto ExecutionModeBit : getExecutionModeBits(EM & EC.Mask))
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| LaneBitmask.h | 12 /// A lane mask is a bitmask representing the covering of a register with
17 /// physical registers. The individual bits in a lane mask can't be assigned
46 explicit constexpr LaneBitmask(Type V) : Mask(V) {}
48 constexpr bool operator== (LaneBitmask M) const { return Mask == M.Mask; }
49 constexpr bool operator!= (LaneBitmask M) const { return Mask != M.Mask; }
50 constexpr bool operator< (LaneBitmask M) const { return Mask < M.Mask; }
51 constexpr bool none() const { return Mask == 0;
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/MCA/ |
| InstrBuilder.cpp | 57 // part of a "Super" resource. The key value is the "Super" resource mask ID.
79 uint64_t Mask = ProcResourceMasks[PRE->ProcResourceIdx];
83 Buffers.setBit(getResourceStateIndex(Mask));
89 Worklist.emplace_back(ResourcePlusCycles(Mask, ResourceUsage(RCy)));
98 // Sort elements by mask popcount, so that we prioritize resource units over
127 // Remove the leading 1 from the resource group mask.
161 // Remove the leading 1 from the resource group mask.
162 uint64_t Mask = RPC.first ^ PowerOf2Floor(RPC.first);
163 uint64_t MaxResourceUnits = countPopulation(Mask);
164 if (RPC.second.NumUnits > countPopulation(Mask)) {
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Support/ |
| X86TargetParser.cpp | 51 uint32_t Mask = uint32_t(1) << (I % 32);
52 return (Bits[I / 32] & Mask) != 0;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/MCTargetDesc/ |
| M68kInstPrinter.cpp | 88 unsigned Mask = MI->getOperand(opNum).getImm();
89 assert((Mask & 0xFFFF) == Mask && "Mask is always 16 bits");
91 // A move mask is splitted into two parts:
97 // mask is 0b101110, we want to print "D1-D3,D5" instead of
108 HalfMask = (Mask >> s) & 0xFF;
111 if (s != 0 && (Mask & 0xFF) && HalfMask)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 290 uint64_t Mask = ((uint64_t)(-1) >>
292 CurVal |= Value & Mask;
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/ |
| BottleneckAnalysis.cpp | 85 uint64_t Mask = ProcResID2Mask[ProcResID];
87 if (Mask == Current) {
93 Mask ^= Current;
94 while (Mask) {
95 uint64_t SubUnit = Mask & (-Mask);
99 Mask ^= SubUnit;
165 OS << " - RESOURCE MASK: " << DE.ResourceOrRegID;
478 uint64_t Mask, unsigned Cost) {
482 DG.addResourceDep(From, To + SourceSize, Mask, Cost)
[all...] |
| /src/sys/external/bsd/acpica/dist/executer/ |
| exfldio.c | 606 * Mask - bitmask within field datum
619 UINT64 Mask,
628 ACPI_FUNCTION_TRACE_U32 (ExWriteWithUpdateRule, Mask);
635 /* If the mask is all ones, we don't need to worry about the update rule */
637 if (Mask != ACPI_UINT64_MAX)
645 * Check if update rule needs to be applied (not if mask is all
648 if ((~Mask << (ACPI_MUL_8 (sizeof (Mask)) -
662 MergedValue |= (CurrentValue & ~Mask);
670 MergedValue |= ~Mask;
[all...] |
| /src/sys/external/bsd/acpica/dist/resources/ |
| rsutils.c | 58 * PARAMETERS: Mask - Bitmask to decode
63 * DESCRIPTION: Convert a bit mask into a list of values
69 UINT16 Mask,
79 /* Decode the mask bits */
81 for (i = 0, BitCount = 0; Mask; i++)
83 if (Mask & 0x0001)
89 Mask >>= 1;
115 UINT16 Mask;
123 for (i = 0, Mask = 0; i < Count; i++)
125 Mask |= (0x1 << List[i])
[all...] |
| /src/sys/dev/acpi/ |
| apei_erst.c | 385 const uint64_t Mask = header->Mask;
393 " BitOffset=%"PRIu8" Mask=0x%"PRIx64" Value=0x%"PRIx64
400 BitOffset, Mask, Value,
413 M->y = apei_read_register(reg, map, Mask);
418 v = apei_read_register(reg, map, Mask);
423 apei_write_register(reg, map, Mask, preserve_register, M->x);
426 apei_write_register(reg, map, Mask, preserve_register, Value);
431 M->var1 = apei_read_register(reg, map, Mask);
434 M->var2 = apei_read_register(reg, map, Mask);
[all...] |
