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    Searched defs:Pressure (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNSchedStrategy.h 27 /// heuristics to determine excess/critical pressure sets. Its goal is to
43 std::vector<unsigned> Pressure;
57 // schedule() have seen a an excess register pressure and had to track
58 // register pressure for actual scheduling heuristics.
110 // Record regions with high register pressure.
116 // Region pressure cache.
117 SmallVector<GCNRegPressure, 32> Pressure;
125 // Return current region pressure.
128 // Compute and cache live-ins and pressure for all regions in block.
GCNSchedStrategy.cpp 36 // scheduling and before regalloc increase register pressure.
70 Pressure.clear();
74 TempTracker.getDownwardPressure(SU->getInstr(), Pressure, MaxPressure);
76 // FIXME: I think for bottom up scheduling, the register pressure is cached
78 TempTracker.getUpwardPressure(SU->getInstr(), Pressure, MaxPressure);
81 unsigned NewSGPRPressure = Pressure[AMDGPU::RegisterPressureSets::SReg_32];
82 unsigned NewVGPRPressure = Pressure[AMDGPU::RegisterPressureSets::VGPR_32];
84 // If two instructions increase the pressure of different register sets
88 // when we report excess/critical register pressure, we do it either
100 // register pressure
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SIMachineScheduler.cpp 35 // . The less the register pressure, the best load latencies are hidden
39 // behaviours. For example when register pressure becomes high, it can either
40 // manage to prevent register pressure from going too high, or it can
41 // increase register pressure even more than if it hadn't taken register
42 // pressure into account.
248 std::vector<unsigned> pressure; local
252 TopRPTracker.getDownwardPressure(SU->getInstr(), pressure, MaxPressure);
253 TryCand.SGPRUsage = pressure[AMDGPU::RegisterPressureSets::SReg_32];
254 TryCand.VGPRUsage = pressure[AMDGPU::RegisterPressureSets::VGPR_32];
308 IntervalPressure Pressure, BotPressure
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