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    Searched defs:allowed_vdd_mclk_table (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c 682 struct phm_clock_voltage_dependency_table *allowed_vdd_mclk_table = local in function:smu7_setup_dpm_tables_v0
693 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
695 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table->count >= 1,
712 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
716 for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
718 allowed_vdd_mclk_table->entries[i].clk) {
720 allowed_vdd_mclk_table->entries[i].clk;
728 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
735 allowed_vdd_mclk_table = hwmgr->dyn_state.vddci_dependency_on_mclk;
737 if (NULL != allowed_vdd_mclk_table) {
    [all...]
amdgpu_smu7_hwmgr.c 682 struct phm_clock_voltage_dependency_table *allowed_vdd_mclk_table = local in function:smu7_setup_dpm_tables_v0
693 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
695 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table->count >= 1,
712 PP_ASSERT_WITH_CODE(allowed_vdd_mclk_table != NULL,
716 for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
718 allowed_vdd_mclk_table->entries[i].clk) {
720 allowed_vdd_mclk_table->entries[i].clk;
728 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
735 allowed_vdd_mclk_table = hwmgr->dyn_state.vddci_dependency_on_mclk;
737 if (NULL != allowed_vdd_mclk_table) {
    [all...]

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