| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| soc15.h | 43 u32 and_mask; member in struct:soc15_reg_golden
81 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
82 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
|
| soc15.h | 43 u32 and_mask; member in struct:soc15_reg_golden
81 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
82 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
|
| soc15.h | 43 u32 and_mask; member in struct:soc15_reg_golden
81 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
82 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
|
| soc15.h | 43 u32 and_mask; member in struct:soc15_reg_golden
81 #define SOC15_REG_GOLDEN_VALUE(ip, inst, reg, and_mask, or_mask) \
82 { ip##_HWIP, inst, reg##_BASE_IDX, reg, and_mask, or_mask }
|
| amdgpu_device.c | 703 u32 tmp, reg, and_mask, or_mask; local
711 and_mask = registers[i + 1];
714 if (and_mask == 0xffffffff) {
718 tmp &= ~and_mask;
720 tmp |= (or_mask & and_mask);
|
| amdgpu_device.c | 703 u32 tmp, reg, and_mask, or_mask; local
711 and_mask = registers[i + 1];
714 if (and_mask == 0xffffffff) {
718 tmp &= ~and_mask;
720 tmp |= (or_mask & and_mask);
|
| amdgpu_device.c | 703 u32 tmp, reg, and_mask, or_mask; local
711 and_mask = registers[i + 1];
714 if (and_mask == 0xffffffff) {
718 tmp &= ~and_mask;
720 tmp |= (or_mask & and_mask);
|
| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_device.c | 212 u32 tmp, reg, and_mask, or_mask; local
220 and_mask = registers[i + 1];
223 if (and_mask == 0xffffffff) {
227 tmp &= ~and_mask;
|
| radeon_device.c | 212 u32 tmp, reg, and_mask, or_mask; local
220 and_mask = registers[i + 1];
223 if (and_mask == 0xffffffff) {
227 tmp &= ~and_mask;
|
| radeon_device.c | 212 u32 tmp, reg, and_mask, or_mask; local
220 and_mask = registers[i + 1];
223 if (and_mask == 0xffffffff) {
227 tmp &= ~and_mask;
|
| radeon_device.c | 212 u32 tmp, reg, and_mask, or_mask; local
220 and_mask = registers[i + 1];
223 if (and_mask == 0xffffffff) {
227 tmp &= ~and_mask;
|
| radeon_combios.c | 2897 uint32_t reg, val, and_mask, or_mask; local
2923 and_mask = RBIOS32(index);
2928 val = (val & and_mask) | or_mask;
2977 and_mask = RBIOS32(index);
2982 val = (val & and_mask) | or_mask;
2992 and_mask = RBIOS32(index);
2997 val = (val & and_mask) | or_mask;
3028 uint32_t val, and_mask, or_mask; local
3044 and_mask = RBIOS32(offset);
3049 tmp &= and_mask;
3108 uint32_t and_mask, or_mask; local
[all...] |
| radeon_combios.c | 2897 uint32_t reg, val, and_mask, or_mask; local
2923 and_mask = RBIOS32(index);
2928 val = (val & and_mask) | or_mask;
2977 and_mask = RBIOS32(index);
2982 val = (val & and_mask) | or_mask;
2992 and_mask = RBIOS32(index);
2997 val = (val & and_mask) | or_mask;
3028 uint32_t val, and_mask, or_mask; local
3044 and_mask = RBIOS32(offset);
3049 tmp &= and_mask;
3108 uint32_t and_mask, or_mask; local
[all...] |
| radeon_combios.c | 2897 uint32_t reg, val, and_mask, or_mask; local
2923 and_mask = RBIOS32(index);
2928 val = (val & and_mask) | or_mask;
2977 and_mask = RBIOS32(index);
2982 val = (val & and_mask) | or_mask;
2992 and_mask = RBIOS32(index);
2997 val = (val & and_mask) | or_mask;
3028 uint32_t val, and_mask, or_mask; local
3044 and_mask = RBIOS32(offset);
3049 tmp &= and_mask;
3108 uint32_t and_mask, or_mask; local
[all...] |
| /src/external/gpl3/gcc/dist/gcc/config/epiphany/ |
| epiphany.h | 431 rtx and_mask;
426 rtx and_mask; member in struct:machine_function
|
| epiphany.h | 431 rtx and_mask;
426 rtx and_mask; member in struct:machine_function
|
| epiphany.h | 431 rtx and_mask;
426 rtx and_mask; member in struct:machine_function
|
| /src/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| rs6000-p8swap.cc | 2244 rtx and_mask = 0; local
2259 and_mask = XEXP (and_op, 1);
2267 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
2324 rtx and_mask = 0; local
2339 and_mask = XEXP (and_op, 1);
2347 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
|
| rs6000-p8swap.cc | 2244 rtx and_mask = 0; local
2259 and_mask = XEXP (and_op, 1);
2267 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
2324 rtx and_mask = 0; local
2339 and_mask = XEXP (and_op, 1);
2347 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
|
| rs6000-p8swap.cc | 2244 rtx and_mask = 0; local
2259 and_mask = XEXP (and_op, 1);
2267 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
2324 rtx and_mask = 0; local
2339 and_mask = XEXP (and_op, 1);
2347 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
|
| /src/external/gpl3/gcc.old/dist/gcc/config/epiphany/ |
| epiphany.h | 433 rtx and_mask;
428 rtx and_mask; member in struct:machine_function
|
| epiphany.h | 433 rtx and_mask;
428 rtx and_mask; member in struct:machine_function
|
| epiphany.h | 433 rtx and_mask;
428 rtx and_mask; member in struct:machine_function
|
| /src/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| rs6000-p8swap.cc | 2242 rtx and_mask = 0; local
2257 and_mask = XEXP (and_op, 1);
2265 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
2322 rtx and_mask = 0; local
2337 and_mask = XEXP (and_op, 1);
2345 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
|
| rs6000-p8swap.cc | 2242 rtx and_mask = 0; local
2257 and_mask = XEXP (and_op, 1);
2265 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
2322 rtx and_mask = 0; local
2337 and_mask = XEXP (and_op, 1);
2345 XEXP (mem, 0) = gen_rtx_AND (GET_MODE (new_reg), new_reg, and_mask);
|
