| /src/sys/arch/arm/arm/ |
| cpu_subr.c | 70 volatile u_long arm_cpu_hatched[howmany(MAXCPUS, CPUINDEX_DIVISOR)] __cacheline_aligned = { 0 }; variable in typeref:typename:volatile u_long[howmany (MAXCPUS,CPUINDEX_DIVISOR)]__cacheline_aligned
87 atomic_or_ulong(&arm_cpu_mbox[n], arm_cpu_hatched[n]);
118 return (atomic_load_acquire(&arm_cpu_hatched[off]) & __BIT(bit)) != 0;
129 atomic_or_ulong(&arm_cpu_hatched[off], bit);
|
| cpu_subr.c | 70 volatile u_long arm_cpu_hatched[howmany(MAXCPUS, CPUINDEX_DIVISOR)] __cacheline_aligned = { 0 }; variable in typeref:typename:volatile u_long[howmany (MAXCPUS,CPUINDEX_DIVISOR)]__cacheline_aligned
87 atomic_or_ulong(&arm_cpu_mbox[n], arm_cpu_hatched[n]);
118 return (atomic_load_acquire(&arm_cpu_hatched[off]) & __BIT(bit)) != 0;
129 atomic_or_ulong(&arm_cpu_hatched[off], bit);
|
| cpu_subr.c | 70 volatile u_long arm_cpu_hatched[howmany(MAXCPUS, CPUINDEX_DIVISOR)] __cacheline_aligned = { 0 }; variable in typeref:typename:volatile u_long[howmany (MAXCPUS,CPUINDEX_DIVISOR)]__cacheline_aligned
87 atomic_or_ulong(&arm_cpu_mbox[n], arm_cpu_hatched[n]);
118 return (atomic_load_acquire(&arm_cpu_hatched[off]) & __BIT(bit)) != 0;
129 atomic_or_ulong(&arm_cpu_hatched[off], bit);
|
