| /src/sys/arch/arm/imx/ |
| imx31_icu.c | 76 #define INTC_READ(avic, reg) \
77 bus_space_read_4((avic)->avic_memt, (avic)->avic_memh, (reg))
78 #define INTC_WRITE(avic, reg, val) \
79 bus_space_write_4((avic)->avic_memt, (avic)->avic_memh, (reg), (val))
86 struct avic_softc * const avic = (void *) pic; local
89 INTC_WRITE(avic, IMX31_INTENABLEL, irq_mask);
91 INTC_WRITE(avic, IMX31_INTENABLEH, irq_mask);
98 INTC_WRITE(avic, IMX31_INTENNUM, irq_base)
106 struct avic_softc * const avic = (void *) pic; local
126 struct avic_softc * const avic = (void *) pic; local
155 struct avic_softc * const avic = device_lookup_private(&avic_cd, 0); local
223 struct avic_softc * const avic = device_private(self); local
[all...] |
| imx31_icu.c | 76 #define INTC_READ(avic, reg) \
77 bus_space_read_4((avic)->avic_memt, (avic)->avic_memh, (reg))
78 #define INTC_WRITE(avic, reg, val) \
79 bus_space_write_4((avic)->avic_memt, (avic)->avic_memh, (reg), (val))
86 struct avic_softc * const avic = (void *) pic; local
89 INTC_WRITE(avic, IMX31_INTENABLEL, irq_mask);
91 INTC_WRITE(avic, IMX31_INTENABLEH, irq_mask);
98 INTC_WRITE(avic, IMX31_INTENNUM, irq_base)
106 struct avic_softc * const avic = (void *) pic; local
126 struct avic_softc * const avic = (void *) pic; local
155 struct avic_softc * const avic = device_lookup_private(&avic_cd, 0); local
223 struct avic_softc * const avic = device_private(self); local
[all...] |
| /src/sys/dev/nvmm/x86/ |
| nvmm_x86_svm.c | 367 uint64_t avic; member in struct:vmcb_ctrl
|
| nvmm_x86_svm.c | 367 uint64_t avic; member in struct:vmcb_ctrl
|
