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  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/
tegra234.dtsi 32 clocks = <&bpmp TEGRA234_CLK_UARTA>;
34 resets = <&bpmp TEGRA234_RESET_UARTA>;
43 clocks = <&bpmp TEGRA234_CLK_SDMMC4>;
45 resets = <&bpmp TEGRA234_RESET_SDMMC4>;
54 clocks = <&bpmp TEGRA234_CLK_FUSE>;
134 label = "cpu-bpmp-tx";
140 label = "cpu-bpmp-rx";
145 bpmp: bpmp { label
146 compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp"
    [all...]
tegra234.dtsi 32 clocks = <&bpmp TEGRA234_CLK_UARTA>;
34 resets = <&bpmp TEGRA234_RESET_UARTA>;
43 clocks = <&bpmp TEGRA234_CLK_SDMMC4>;
45 resets = <&bpmp TEGRA234_RESET_SDMMC4>;
54 clocks = <&bpmp TEGRA234_CLK_FUSE>;
134 label = "cpu-bpmp-tx";
140 label = "cpu-bpmp-rx";
145 bpmp: bpmp { label
146 compatible = "nvidia,tegra234-bpmp", "nvidia,tegra186-bpmp"
    [all...]
tegra186.dtsi 10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
55 clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
56 <&bpmp TEGRA186_CLK_EQOS_AXI>,
57 <&bpmp TEGRA186_CLK_EQOS_RX>,
58 <&bpmp TEGRA186_CLK_EQOS_TX>,
59 <&bpmp TEGRA186_CLK_EQOS_PTP_REF>;
61 resets = <&bpmp TEGRA186_RESET_EQOS>;
79 clocks = <&bpmp TEGRA186_CLK_APE>,
80 <&bpmp TEGRA186_CLK_APB2APE>;
82 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>
1628 bpmp: bpmp { label
    [all...]
tegra186.dtsi 10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
55 clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,
56 <&bpmp TEGRA186_CLK_EQOS_AXI>,
57 <&bpmp TEGRA186_CLK_EQOS_RX>,
58 <&bpmp TEGRA186_CLK_EQOS_TX>,
59 <&bpmp TEGRA186_CLK_EQOS_PTP_REF>;
61 resets = <&bpmp TEGRA186_RESET_EQOS>;
79 clocks = <&bpmp TEGRA186_CLK_APE>,
80 <&bpmp TEGRA186_CLK_APB2APE>;
82 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>
1628 bpmp: bpmp { label
    [all...]
tegra194.dtsi 9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
54 clocks = <&bpmp TEGRA194_CLK_AXI_CBB>,
55 <&bpmp TEGRA194_CLK_EQOS_AXI>,
56 <&bpmp TEGRA194_CLK_EQOS_RX>,
57 <&bpmp TEGRA194_CLK_EQOS_TX>,
58 <&bpmp TEGRA194_CLK_EQOS_PTP_REF>;
60 resets = <&bpmp TEGRA194_RESET_EQOS>;
78 clocks = <&bpmp TEGRA194_CLK_APE>,
79 <&bpmp TEGRA194_CLK_APB2APE>;
81 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>
2267 bpmp: bpmp { label
    [all...]
tegra194.dtsi 9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
54 clocks = <&bpmp TEGRA194_CLK_AXI_CBB>,
55 <&bpmp TEGRA194_CLK_EQOS_AXI>,
56 <&bpmp TEGRA194_CLK_EQOS_RX>,
57 <&bpmp TEGRA194_CLK_EQOS_TX>,
58 <&bpmp TEGRA194_CLK_EQOS_PTP_REF>;
60 resets = <&bpmp TEGRA194_RESET_EQOS>;
78 clocks = <&bpmp TEGRA194_CLK_APE>,
79 <&bpmp TEGRA194_CLK_APB2APE>;
81 power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>
2267 bpmp: bpmp { label
    [all...]

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