| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| suniv-f1c100s.dtsi | 65 ccu: clock@1c20000 { label
66 compatible = "allwinner,suniv-f1c100s-ccu";
85 clocks = <&ccu 37>, <&osc24M>, <&osc32k>;
117 clocks = <&ccu 38>;
118 resets = <&ccu 24>;
128 clocks = <&ccu 39>;
129 resets = <&ccu 25>;
139 clocks = <&ccu 40>;
140 resets = <&ccu 26>;
|
| sun8i-v3s.dtsi | 45 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
46 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
64 <&ccu CLK_TCON0>;
77 clocks = <&ccu CLK_CPU>;
126 clocks = <&ccu CLK_BUS_DE>,
127 <&ccu CLK_DE>;
130 resets = <&ccu RST_BUS_DE>;
180 clocks = <&ccu CLK_BUS_DMA>;
181 resets = <&ccu RST_BUS_DMA>;
189 clocks = <&ccu CLK_BUS_TCON0>
321 ccu: clock@1c20000 { label
[all...] |
| sun5i.dtsi | 45 #include <dt-bindings/clock/sun5i-ccu.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
62 clocks = <&ccu CLK_CPU>;
75 clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
76 <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
84 clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>
434 ccu: clock@1c20000 { label
[all...] |
| sun8i-a23-a33.dtsi | 47 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
48 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
64 clocks = <&ccu CLK_BUS_LCD>, <&ccu CLK_BUS_DE_BE>,
65 <&ccu CLK_LCD_CH0>, <&ccu CLK_DE_BE>,
66 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_DRC>;
159 clocks = <&ccu CLK_BUS_DMA>;
160 resets = <&ccu RST_BUS_DMA>
330 ccu: clock@1c20000 { label
[all...] |
| sun8i-a83t.dtsi | 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
67 clocks = <&ccu CLK_C0CPUX>;
78 clocks = <&ccu CLK_C0CPUX>;
89 clocks = <&ccu CLK_C0CPUX>;
100 clocks = <&ccu CLK_C0CPUX>;
111 clocks = <&ccu CLK_C1CPUX>;
122 clocks = <&ccu CLK_C1CPUX>
700 ccu: clock@1c20000 { label
[all...] |
| sunxi-h3-h5.dtsi | 44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
66 <&ccu CLK_TCON0>, <&ccu CLK_HDMI>;
75 <&ccu CLK_TVE>;
118 clocks = <&ccu CLK_BUS_DE>,
119 <&ccu CLK_DE>;
122 resets = <&ccu RST_BUS_DE>
386 ccu: clock@1c20000 { label
[all...] |
| sun4i-a10.dtsi | 46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
67 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
68 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
69 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>;
77 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>
651 ccu: clock@1c20000 { label
[all...] |
| sun6i-a31.dtsi | 48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
69 clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
70 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
71 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
72 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>
602 ccu: clock@1c20000 { label
[all...] |
| sun8i-r40.dtsi | 46 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/reset/sun8i-r40-ccu.h>
140 clocks = <&ccu CLK_BUS_DE>,
141 <&ccu CLK_DE>;
144 resets = <&ccu RST_BUS_DE>;
197 clocks = <&ccu CLK_BUS_DEINTERLACE>,
198 <&ccu CLK_DEINTERLACE>,
204 <&ccu CLK_DRAM_CSI1>;
206 resets = <&ccu RST_BUS_DEINTERLACE>;
248 clocks = <&ccu CLK_BUS_DMA>
485 ccu: clock@1c20000 { label
[all...] |
| sun9i-a80.dtsi | 47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
226 <&ccu CLK_PLL_PERIPH0>,
227 <&ccu CLK_PLL_AUDIO>;
326 clocks = <&ccu CLK_BUS_GMAC>, <&gmac_tx_clk>;
328 resets = <&ccu RST_BUS_GMAC>;
449 clocks = <&ccu CLK_BUS_USB>, <&osc24M>;
464 resets = <&ccu RST_BUS_SS>;
465 clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>
935 ccu: clock@6000000 { label
[all...] |
| sun7i-a20.dtsi | 48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
70 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
71 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
72 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
73 <&ccu CLK_HDMI>;
81 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>
761 ccu: clock@1c20000 { label
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/allwinner/ |
| sun50i-a100.dtsi | 7 #include <dt-bindings/clock/sun50i-a100-ccu.h>
8 #include <dt-bindings/clock/sun50i-a100-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-a100-ccu.h>
10 #include <dt-bindings/reset/sun50i-a100-r-ccu.h>
95 ccu: clock@3001000 { label
96 compatible = "allwinner,sun50i-a100-ccu";
136 clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&osc32k>;
155 clocks = <&ccu CLK_BUS_UART0>;
156 resets = <&ccu RST_BUS_UART0>;
166 clocks = <&ccu CLK_BUS_UART1>
[all...] |
| sun50i-h6.dtsi | 5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
45 clocks = <&ccu CLK_CPUX>;
55 clocks = <&ccu CLK_CPUX>;
65 clocks = <&ccu CLK_CPUX>;
75 clocks = <&ccu CLK_CPUX>;
139 clocks = <&ccu CLK_DE>,
140 <&ccu CLK_BUS_DE>
245 ccu: clock@3001000 { label
[all...] |
| sun50i-a64.dtsi | 6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
29 clocks = <&ccu CLK_TCON0>,
39 <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
54 clocks = <&ccu CLK_CPUX>;
65 clocks = <&ccu CLK_CPUX>;
76 clocks = <&ccu CLK_CPUX>
644 ccu: clock@1c20000 { label
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/riscv/boot/dts/allwinner/ |
| sunxi-d1s-t113.dtsi | 7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
12 #include <dt-bindings/reset/sun20i-d1-r-ccu.h>
46 clocks = <&ccu CLK_APB0>,
148 ccu: clock-controller@2001000 { label
149 compatible = "allwinner,sun20i-d1-ccu";
162 clocks = <&ccu CLK_BUS_GPADC>;
163 resets = <&ccu RST_BUS_GPADC>;
174 clocks = <&ccu CLK_BUS_DMIC>
[all...] |
