| /src/sys/dev/tc/ |
| tcds.c | 207 /* XXX Initial contents of CIR? */
210 * Remember if GPI2 is set in the CIR; we'll need it later.
366 uint32_t cir; local in function:tcds_scsi_reset
371 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
372 TCDS_CIR_CLR(cir, sc->sc_resetbits);
373 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
377 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
378 TCDS_CIR_SET(cir, sc->sc_resetbits);
379 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
403 uint32_t cir; local in function:tcds_dma_enable
419 uint32_t cir; local in function:tcds_scsi_isintr
437 uint32_t cir; local in function:tcds_scsi_iserr
[all...] |
| tcds.c | 207 /* XXX Initial contents of CIR? */
210 * Remember if GPI2 is set in the CIR; we'll need it later.
366 uint32_t cir; local in function:tcds_scsi_reset
371 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
372 TCDS_CIR_CLR(cir, sc->sc_resetbits);
373 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
377 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
378 TCDS_CIR_SET(cir, sc->sc_resetbits);
379 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
403 uint32_t cir; local in function:tcds_dma_enable
419 uint32_t cir; local in function:tcds_scsi_isintr
437 uint32_t cir; local in function:tcds_scsi_iserr
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt7622.dtsi | 247 cir: cir@10009000 { label
248 compatible = "mediatek,mt7622-cir";
|
| mt7622.dtsi | 247 cir: cir@10009000 { label
248 compatible = "mediatek,mt7622-cir";
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| mt7623.dtsi | 312 cir: cir@10013000 { label
313 compatible = "mediatek,mt7623-cir";
977 cir_pins_a:cir-default {
978 pins-cir {
|
| mt7623.dtsi | 312 cir: cir@10013000 { label
313 compatible = "mediatek,mt7623-cir";
977 cir_pins_a:cir-default {
978 pins-cir {
|
