/src/sys/dev/clk/ |
clk.c | 258 clk_enable(struct clk *clk) function in typeref:typename:int
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clk.c | 258 clk_enable(struct clk *clk) function in typeref:typename:int
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clk.c | 258 clk_enable(struct clk *clk) function in typeref:typename:int
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
amdgpu_dcn10_hubp.c | 1216 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp1_clk_cntl 1218 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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amdgpu_dcn10_hubp.c | 1216 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp1_clk_cntl 1218 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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amdgpu_dcn10_hubp.c | 1216 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp1_clk_cntl 1218 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
amdgpu_dcn20_hubp.c | 1030 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp2_clk_cntl 1032 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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amdgpu_dcn20_hubp.c | 1030 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp2_clk_cntl 1032 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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amdgpu_dcn20_hubp.c | 1030 uint32_t clk_enable = enable ? 1 : 0; local in function:hubp2_clk_cntl 1032 REG_UPDATE(HUBP_CLK_CNTL, HUBP_CLOCK_ENABLE, clk_enable);
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