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Searched defs:clk_ranges (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
amdgpu_dce112_resource.c	1039 struct dm_pp_wm_sets_with_clock_ranges clk_ranges = {0}; local in function:bw_calcs_data_update_from_pplib 1138 clk_ranges.num_wm_sets = 4; 1139 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; 1140 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = 1142 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = 1144 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = 1146 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = 1149 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; 1150 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = 1153 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000 [all...]
amdgpu_dce112_resource.c	1039 struct dm_pp_wm_sets_with_clock_ranges clk_ranges = {0}; local in function:bw_calcs_data_update_from_pplib 1138 clk_ranges.num_wm_sets = 4; 1139 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; 1140 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = 1142 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = 1144 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = 1146 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = 1149 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; 1150 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = 1153 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000 [all...]
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_resource.c	898 struct dm_pp_wm_sets_with_clock_ranges clk_ranges = {0}; local in function:bw_calcs_data_update_from_pplib 979 clk_ranges.num_wm_sets = 4; 980 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; 981 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = 983 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = 985 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = 987 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = 990 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; 991 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = 994 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000 [all...]
amdgpu_dce120_resource.c	898 struct dm_pp_wm_sets_with_clock_ranges clk_ranges = {0}; local in function:bw_calcs_data_update_from_pplib 979 clk_ranges.num_wm_sets = 4; 980 clk_ranges.wm_clk_ranges[0].wm_set_id = WM_SET_A; 981 clk_ranges.wm_clk_ranges[0].wm_min_eng_clk_in_khz = 983 clk_ranges.wm_clk_ranges[0].wm_max_eng_clk_in_khz = 985 clk_ranges.wm_clk_ranges[0].wm_min_mem_clk_in_khz = 987 clk_ranges.wm_clk_ranges[0].wm_max_mem_clk_in_khz = 990 clk_ranges.wm_clk_ranges[1].wm_set_id = WM_SET_B; 991 clk_ranges.wm_clk_ranges[1].wm_min_eng_clk_in_khz = 994 clk_ranges.wm_clk_ranges[1].wm_max_eng_clk_in_khz = 5000000 [all...]

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