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Searched defs:clk_state (Results 1 - 4 of 4) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/
amdgpu_dce_clk_mgr.c	`293 enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID; local 297 clk_state = DM_PP_CLOCKS_STATE_ULTRA_LOW; 301 clk_state = DM_PP_CLOCKS_STATE_LOW; 305 clk_state = DM_PP_CLOCKS_STATE_NOMINAL; 309 clk_state = DM_PP_CLOCKS_STATE_PERFORMANCE; 313 clk_state = DM_PP_CLOCKS_STATE_INVALID; 321 clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =`
amdgpu_dce_clk_mgr.c	`293 enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID; local 297 clk_state = DM_PP_CLOCKS_STATE_ULTRA_LOW; 301 clk_state = DM_PP_CLOCKS_STATE_LOW; 305 clk_state = DM_PP_CLOCKS_STATE_NOMINAL; 309 clk_state = DM_PP_CLOCKS_STATE_PERFORMANCE; 313 clk_state = DM_PP_CLOCKS_STATE_INVALID; 321 clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
dce_clk_mgr.c	`368 enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID; local 372 clk_state = DM_PP_CLOCKS_STATE_ULTRA_LOW; 376 clk_state = DM_PP_CLOCKS_STATE_LOW; 380 clk_state = DM_PP_CLOCKS_STATE_NOMINAL; 384 clk_state = DM_PP_CLOCKS_STATE_PERFORMANCE; 388 clk_state = DM_PP_CLOCKS_STATE_INVALID; 395 clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =`
dce_clk_mgr.c	`368 enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID; local 372 clk_state = DM_PP_CLOCKS_STATE_ULTRA_LOW; 376 clk_state = DM_PP_CLOCKS_STATE_LOW; 380 clk_state = DM_PP_CLOCKS_STATE_NOMINAL; 384 clk_state = DM_PP_CLOCKS_STATE_PERFORMANCE; 388 clk_state = DM_PP_CLOCKS_STATE_INVALID; 395 clk_mgr_dce->max_clks_by_state[clk_state].display_clk_khz =`

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