| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_pp_smu.c | 774 struct pp_display_clock_request clock_req; local in function:pp_nv_set_hard_min_dcefclk_by_freq
779 clock_req.clock_type = amd_pp_dcef_clock;
780 clock_req.clock_freq_in_khz = mhz * 1000;
785 if (smu_display_clock_voltage_request(smu, &clock_req))
796 struct pp_display_clock_request clock_req; local in function:pp_nv_set_hard_min_uclk_by_freq
801 clock_req.clock_type = amd_pp_mem_clock;
802 clock_req.clock_freq_in_khz = mhz * 1000;
807 if (smu_display_clock_voltage_request(smu, &clock_req))
832 struct pp_display_clock_request clock_req; local in function:pp_nv_set_voltage_by_freq
839 clock_req.clock_type = amd_pp_disp_clock
[all...] |
| amdgpu_dm_pp_smu.c | 774 struct pp_display_clock_request clock_req; local in function:pp_nv_set_hard_min_dcefclk_by_freq
779 clock_req.clock_type = amd_pp_dcef_clock;
780 clock_req.clock_freq_in_khz = mhz * 1000;
785 if (smu_display_clock_voltage_request(smu, &clock_req))
796 struct pp_display_clock_request clock_req; local in function:pp_nv_set_hard_min_uclk_by_freq
801 clock_req.clock_type = amd_pp_mem_clock;
802 clock_req.clock_freq_in_khz = mhz * 1000;
807 if (smu_display_clock_voltage_request(smu, &clock_req))
832 struct pp_display_clock_request clock_req; local in function:pp_nv_set_voltage_by_freq
839 clock_req.clock_type = amd_pp_disp_clock
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| amdgpu_navi10_ppt.c | 1461 struct pp_display_clock_request clock_req; local in function:navi10_notify_smc_display_config
1469 clock_req.clock_type = amd_pp_dcef_clock;
1470 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
1472 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
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| amdgpu_vega20_ppt.c | 2243 struct pp_display_clock_request clock_req; local in function:vega20_notify_smc_display_config
2251 clock_req.clock_type = amd_pp_dcef_clock;
2252 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
2253 if (!smu_v11_0_display_clock_voltage_request(smu, &clock_req)) {
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| amdgpu_navi10_ppt.c | 1461 struct pp_display_clock_request clock_req; local in function:navi10_notify_smc_display_config
1469 clock_req.clock_type = amd_pp_dcef_clock;
1470 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
1472 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req);
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| amdgpu_vega20_ppt.c | 2243 struct pp_display_clock_request clock_req; local in function:vega20_notify_smc_display_config
2251 clock_req.clock_type = amd_pp_dcef_clock;
2252 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10;
2253 if (!smu_v11_0_display_clock_voltage_request(smu, &clock_req)) {
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_smu10_hwmgr.c | 64 struct pp_display_clock_request *clock_req)
67 enum amd_pp_clock_type clk_type = clock_req->clock_type;
68 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
203 struct pp_display_clock_request clock_req; local in function:smu10_set_clock_limit
206 clock_req.clock_type = amd_pp_dcf_clock;
207 clock_req.clock_freq_in_khz = clocks.dcefClock * 10;
209 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req),
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| amdgpu_vega12_hwmgr.c | 1436 struct pp_display_clock_request *clock_req)
1440 enum amd_pp_clock_type clk_type = clock_req->clock_type;
1441 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
1482 struct pp_display_clock_request clock_req; local in function:vega12_notify_smc_display_config_after_ps_adjustment
1496 clock_req.clock_type = amd_pp_dcef_clock;
1497 clock_req.clock_freq_in_khz = min_clocks.dcefClock/10;
1498 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) {
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| amdgpu_smu10_hwmgr.c | 64 struct pp_display_clock_request *clock_req)
67 enum amd_pp_clock_type clk_type = clock_req->clock_type;
68 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
203 struct pp_display_clock_request clock_req; local in function:smu10_set_clock_limit
206 clock_req.clock_type = amd_pp_dcf_clock;
207 clock_req.clock_freq_in_khz = clocks.dcefClock * 10;
209 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req),
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| amdgpu_vega12_hwmgr.c | 1436 struct pp_display_clock_request *clock_req)
1440 enum amd_pp_clock_type clk_type = clock_req->clock_type;
1441 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
1482 struct pp_display_clock_request clock_req; local in function:vega12_notify_smc_display_config_after_ps_adjustment
1496 clock_req.clock_type = amd_pp_dcef_clock;
1497 clock_req.clock_freq_in_khz = min_clocks.dcefClock/10;
1498 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) {
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| amdgpu_vega20_hwmgr.c | 2252 struct pp_display_clock_request *clock_req)
2256 enum amd_pp_clock_type clk_type = clock_req->clock_type;
2257 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
2307 struct pp_display_clock_request clock_req; local in function:vega20_notify_smc_display_config_after_ps_adjustment
2315 clock_req.clock_type = amd_pp_dcef_clock;
2316 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10;
2317 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) {
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| amdgpu_vega20_hwmgr.c | 2252 struct pp_display_clock_request *clock_req)
2256 enum amd_pp_clock_type clk_type = clock_req->clock_type;
2257 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
2307 struct pp_display_clock_request clock_req; local in function:vega20_notify_smc_display_config_after_ps_adjustment
2315 clock_req.clock_type = amd_pp_dcef_clock;
2316 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10;
2317 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) {
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| amdgpu_vega10_hwmgr.c | 3907 struct pp_display_clock_request *clock_req)
3910 enum amd_pp_clock_type clk_type = clock_req->clock_type;
3911 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
3976 struct pp_display_clock_request clock_req; local in function:vega10_notify_smc_display_config_after_ps_adjustment
3995 clock_req.clock_type = amd_pp_dcef_clock;
3996 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10;
3997 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) {
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| amdgpu_vega10_hwmgr.c | 3907 struct pp_display_clock_request *clock_req)
3910 enum amd_pp_clock_type clk_type = clock_req->clock_type;
3911 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000;
3976 struct pp_display_clock_request clock_req; local in function:vega10_notify_smc_display_config_after_ps_adjustment
3995 clock_req.clock_type = amd_pp_dcef_clock;
3996 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10;
3997 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) {
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