| /src/sys/dev/pci/ |
| piixide.c | 927 pcireg_t interface, cmdsts; local
954 cmdsts = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
955 cmdsts &= ~PCI_COMMAND_INTERRUPT_DISABLE;
956 pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, cmdsts);
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| piixide.c | 927 pcireg_t interface, cmdsts; local
954 cmdsts = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
955 cmdsts &= ~PCI_COMMAND_INTERRUPT_DISABLE;
956 pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, cmdsts);
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| if_rge.c | 540 uint32_t cmdsts, cflags = 0; local
586 cmdsts = RGE_TDCMDSTS_OWN;
587 cmdsts |= txmap->dm_segs[i].ds_len;
590 cmdsts |= RGE_TDCMDSTS_EOR;
592 cmdsts |= RGE_TDCMDSTS_EOF;
595 d->rge_cmdsts = htole32(cmdsts);
604 cmdsts = RGE_TDCMDSTS_SOF;
605 cmdsts |= txmap->dm_segs[0].ds_len;
608 cmdsts |= RGE_TDCMDSTS_EOR;
610 cmdsts |= RGE_TDCMDSTS_EOF
1337 uint32_t cmdsts; local
[all...] |
| if_rge.c | 540 uint32_t cmdsts, cflags = 0; local
586 cmdsts = RGE_TDCMDSTS_OWN;
587 cmdsts |= txmap->dm_segs[i].ds_len;
590 cmdsts |= RGE_TDCMDSTS_EOR;
592 cmdsts |= RGE_TDCMDSTS_EOF;
595 d->rge_cmdsts = htole32(cmdsts);
604 cmdsts = RGE_TDCMDSTS_SOF;
605 cmdsts |= txmap->dm_segs[0].ds_len;
608 cmdsts |= RGE_TDCMDSTS_EOR;
610 cmdsts |= RGE_TDCMDSTS_EOF
1337 uint32_t cmdsts; local
[all...] |
| if_sip.c | 558 sip_init_txdesc(struct sip_softc *sc, int x, bus_addr_t bufptr, uint32_t cmdsts)
571 sipd->sipd_words[sc->sc_cmdsts_idx] = htole32(cmdsts);
1545 uint32_t cmdsts; local
1673 cmdsts = dmamap->dm_segs[seg].ds_len;
1675 cmdsts |= CMDSTS_OWN;
1677 cmdsts |= CMDSTS_MORE;
1679 dmamap->dm_segs[seg].ds_addr, cmdsts);
2042 uint32_t cmdsts; local
2052 cmdsts = le32toh(sc->sc_txdescs[
2054 if (cmdsts & CMDSTS_OWN
2115 uint32_t cmdsts, extsts; local
2331 uint32_t cmdsts; local
2879 uint32_t cmdsts = 0; \/* DEBUG *\/ local
[all...] |
| if_sip.c | 558 sip_init_txdesc(struct sip_softc *sc, int x, bus_addr_t bufptr, uint32_t cmdsts)
571 sipd->sipd_words[sc->sc_cmdsts_idx] = htole32(cmdsts);
1545 uint32_t cmdsts; local
1673 cmdsts = dmamap->dm_segs[seg].ds_len;
1675 cmdsts |= CMDSTS_OWN;
1677 cmdsts |= CMDSTS_MORE;
1679 dmamap->dm_segs[seg].ds_addr, cmdsts);
2042 uint32_t cmdsts; local
2052 cmdsts = le32toh(sc->sc_txdescs[
2054 if (cmdsts & CMDSTS_OWN
2115 uint32_t cmdsts, extsts; local
2331 uint32_t cmdsts; local
2879 uint32_t cmdsts = 0; \/* DEBUG *\/ local
[all...] |
| /src/sys/dev/marvell/ |
| if_gfe.c | 878 unsigned int cmdsts; local
882 cmdsts = gt32toh(rxd->ed_cmdsts);
883 GE_DPRINTF(sc, (":%d=%#x", rxq->rxq_fi, cmdsts));
884 rxq->rxq_cmdsts = cmdsts;
891 if ((cmdsts & RX_CMD_O) && buflen == 0) {
901 if ((cmdsts & (RX_CMD_F | RX_CMD_L | RX_STS_ES)) !=
932 rxq->rxq_cmdsts = cmdsts;
1211 uint32_t cmdsts; local
1214 cmdsts = gt32toh(txd2->ed_cmdsts);
1215 if (cmdsts & TX_CMD_O)
1371 uint32_t cmdsts; local
[all...] |
| if_gfe.c | 878 unsigned int cmdsts; local
882 cmdsts = gt32toh(rxd->ed_cmdsts);
883 GE_DPRINTF(sc, (":%d=%#x", rxq->rxq_fi, cmdsts));
884 rxq->rxq_cmdsts = cmdsts;
891 if ((cmdsts & RX_CMD_O) && buflen == 0) {
901 if ((cmdsts & (RX_CMD_F | RX_CMD_L | RX_STS_ES)) !=
932 rxq->rxq_cmdsts = cmdsts;
1211 uint32_t cmdsts; local
1214 cmdsts = gt32toh(txd2->ed_cmdsts);
1215 if (cmdsts & TX_CMD_O)
1371 uint32_t cmdsts; local
[all...] |
| if_mvgbe.c | 1551 rd->mvgbe_tx_ring[i].cmdsts =
1621 r->cmdsts =
1788 uint32_t first, current, last, cmdsts; local
1869 f->cmdsts = H2MVGBE32(MVGBE_BUFFER_OWNED_BY_DMA);
1874 cmdsts = sc->sc_cmdsts_opts;
1876 cmdsts |= MVGBE_TX_GENERATE_IP_CHKSUM;
1878 cmdsts |=
1881 cmdsts |=
1886 cmdsts |= MVGBE_TX_IP_NO_FRAG |
1890 f->cmdsts = H2MVGBE32(cmdsts
[all...] |
| if_mvgbe.c | 1551 rd->mvgbe_tx_ring[i].cmdsts =
1621 r->cmdsts =
1788 uint32_t first, current, last, cmdsts; local
1869 f->cmdsts = H2MVGBE32(MVGBE_BUFFER_OWNED_BY_DMA);
1874 cmdsts = sc->sc_cmdsts_opts;
1876 cmdsts |= MVGBE_TX_GENERATE_IP_CHKSUM;
1878 cmdsts |=
1881 cmdsts |=
1886 cmdsts |= MVGBE_TX_IP_NO_FRAG |
1890 f->cmdsts = H2MVGBE32(cmdsts
[all...] |
| mvgbereg.h | 789 uint32_t cmdsts; /* Descriptor command status */ member in struct:mvgbe_tx_desc
793 uint32_t cmdsts; /* Descriptor command status */
806 uint32_t cmdsts; /* Descriptor command status */ member in struct:mvgbe_rx_desc
810 uint32_t cmdsts; /* Descriptor command status */
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| mvgbereg.h | 789 uint32_t cmdsts; /* Descriptor command status */ member in struct:mvgbe_tx_desc
793 uint32_t cmdsts; /* Descriptor command status */
806 uint32_t cmdsts; /* Descriptor command status */ member in struct:mvgbe_rx_desc
810 uint32_t cmdsts; /* Descriptor command status */
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| /src/sys/arch/powerpc/booke/pci/ |
| pq3pci.c | 985 pcireg_t cmdsts = pci_conf_read(pc, 0, PCI_COMMAND_STATUS_REG); local
986 cmdsts |= PCI_COMMAND_INTERRUPT_DISABLE;
987 pci_conf_write(pc, 0, PCI_COMMAND_STATUS_REG, cmdsts);
1458 pcireg_t cmdsts, msictl; local
1513 cmdsts = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
1514 cmdsts |= PCI_COMMAND_INTERRUPT_DISABLE;
1515 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, cmdsts);
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| pq3pci.c | 985 pcireg_t cmdsts = pci_conf_read(pc, 0, PCI_COMMAND_STATUS_REG); local
986 cmdsts |= PCI_COMMAND_INTERRUPT_DISABLE;
987 pci_conf_write(pc, 0, PCI_COMMAND_STATUS_REG, cmdsts);
1458 pcireg_t cmdsts, msictl; local
1513 cmdsts = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
1514 cmdsts |= PCI_COMMAND_INTERRUPT_DISABLE;
1515 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, cmdsts);
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