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    Searched defs:cpg_clocks (Results 1 - 24 of 24) sorted by relevancy

  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
r7s72100.dtsi 34 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
48 clocks = <&cpg_clocks R7S72100_CLK_I>;
64 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
123 power-domains = <&cpg_clocks>;
136 power-domains = <&cpg_clocks>;
149 power-domains = <&cpg_clocks>;
162 power-domains = <&cpg_clocks>;
175 power-domains = <&cpg_clocks>;
188 power-domains = <&cpg_clocks>;
397 cpg_clocks: cpg_clocks@fcfe0000 { label
    [all...]
r8a7778.dtsi 56 power-domains = <&cpg_clocks>;
157 power-domains = <&cpg_clocks>;
168 power-domains = <&cpg_clocks>;
180 power-domains = <&cpg_clocks>;
192 power-domains = <&cpg_clocks>;
205 power-domains = <&cpg_clocks>;
220 power-domains = <&cpg_clocks>;
235 power-domains = <&cpg_clocks>;
272 <&cpg_clocks R8A7778_CLK_S1>;
308 <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>
491 cpg_clocks: cpg_clocks@ffc80000 { label
    [all...]
r8a7779.dtsi 29 clocks = <&cpg_clocks R8A7779_CLK_Z>;
36 clocks = <&cpg_clocks R8A7779_CLK_Z>;
44 clocks = <&cpg_clocks R8A7779_CLK_Z>;
52 clocks = <&cpg_clocks R8A7779_CLK_Z>;
76 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
84 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
235 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
247 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
259 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
271 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>
512 cpg_clocks: clocks@ffc80000 { label
    [all...]
r7s72100.dtsi 34 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
48 clocks = <&cpg_clocks R7S72100_CLK_I>;
64 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
123 power-domains = <&cpg_clocks>;
136 power-domains = <&cpg_clocks>;
149 power-domains = <&cpg_clocks>;
162 power-domains = <&cpg_clocks>;
175 power-domains = <&cpg_clocks>;
188 power-domains = <&cpg_clocks>;
397 cpg_clocks: cpg_clocks@fcfe0000 { label
    [all...]
r8a7778.dtsi 56 power-domains = <&cpg_clocks>;
157 power-domains = <&cpg_clocks>;
168 power-domains = <&cpg_clocks>;
180 power-domains = <&cpg_clocks>;
192 power-domains = <&cpg_clocks>;
205 power-domains = <&cpg_clocks>;
220 power-domains = <&cpg_clocks>;
235 power-domains = <&cpg_clocks>;
272 <&cpg_clocks R8A7778_CLK_S1>;
308 <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>
491 cpg_clocks: cpg_clocks@ffc80000 { label
    [all...]
r8a7779.dtsi 29 clocks = <&cpg_clocks R8A7779_CLK_Z>;
36 clocks = <&cpg_clocks R8A7779_CLK_Z>;
44 clocks = <&cpg_clocks R8A7779_CLK_Z>;
52 clocks = <&cpg_clocks R8A7779_CLK_Z>;
76 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
84 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
235 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
247 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
259 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
271 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>
512 cpg_clocks: clocks@ffc80000 { label
    [all...]
r7s72100.dtsi 34 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
48 clocks = <&cpg_clocks R7S72100_CLK_I>;
64 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
123 power-domains = <&cpg_clocks>;
136 power-domains = <&cpg_clocks>;
149 power-domains = <&cpg_clocks>;
162 power-domains = <&cpg_clocks>;
175 power-domains = <&cpg_clocks>;
188 power-domains = <&cpg_clocks>;
397 cpg_clocks: cpg_clocks@fcfe0000 { label
    [all...]
r8a7778.dtsi 56 power-domains = <&cpg_clocks>;
157 power-domains = <&cpg_clocks>;
168 power-domains = <&cpg_clocks>;
180 power-domains = <&cpg_clocks>;
192 power-domains = <&cpg_clocks>;
205 power-domains = <&cpg_clocks>;
220 power-domains = <&cpg_clocks>;
235 power-domains = <&cpg_clocks>;
272 <&cpg_clocks R8A7778_CLK_S1>;
308 <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>
491 cpg_clocks: cpg_clocks@ffc80000 { label
    [all...]
r8a7779.dtsi 29 clocks = <&cpg_clocks R8A7779_CLK_Z>;
36 clocks = <&cpg_clocks R8A7779_CLK_Z>;
44 clocks = <&cpg_clocks R8A7779_CLK_Z>;
52 clocks = <&cpg_clocks R8A7779_CLK_Z>;
76 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
84 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
235 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
247 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
259 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
271 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>
512 cpg_clocks: clocks@ffc80000 { label
    [all...]
r7s72100.dtsi 34 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
48 clocks = <&cpg_clocks R7S72100_CLK_I>;
64 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
123 power-domains = <&cpg_clocks>;
136 power-domains = <&cpg_clocks>;
149 power-domains = <&cpg_clocks>;
162 power-domains = <&cpg_clocks>;
175 power-domains = <&cpg_clocks>;
188 power-domains = <&cpg_clocks>;
397 cpg_clocks: cpg_clocks@fcfe0000 { label
    [all...]
r8a7778.dtsi 56 power-domains = <&cpg_clocks>;
157 power-domains = <&cpg_clocks>;
168 power-domains = <&cpg_clocks>;
180 power-domains = <&cpg_clocks>;
192 power-domains = <&cpg_clocks>;
205 power-domains = <&cpg_clocks>;
220 power-domains = <&cpg_clocks>;
235 power-domains = <&cpg_clocks>;
272 <&cpg_clocks R8A7778_CLK_S1>;
308 <&cpg_clocks R8A7778_CLK_S1>, <&scif_clk>
491 cpg_clocks: cpg_clocks@ffc80000 { label
    [all...]
r8a7779.dtsi 29 clocks = <&cpg_clocks R8A7779_CLK_Z>;
36 clocks = <&cpg_clocks R8A7779_CLK_Z>;
44 clocks = <&cpg_clocks R8A7779_CLK_Z>;
52 clocks = <&cpg_clocks R8A7779_CLK_Z>;
76 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
84 clocks = <&cpg_clocks R8A7779_CLK_ZS>;
235 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
247 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
259 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>;
271 <&cpg_clocks R8A7779_CLK_S1>, <&scif_clk>
512 cpg_clocks: clocks@ffc80000 { label
    [all...]
r8a7740.dtsi 479 cpg_clocks: cpg_clocks@e6150000 { label
497 <&cpg_clocks R8A7740_CLK_USB24S>,
506 <&cpg_clocks R8A7740_CLK_USB24S>,
533 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
540 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
553 clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;
560 clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
588 clocks = <&cpg_clocks R8A7740_CLK_S>,
589 <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>
    [all...]
r8a7740.dtsi 479 cpg_clocks: cpg_clocks@e6150000 { label
497 <&cpg_clocks R8A7740_CLK_USB24S>,
506 <&cpg_clocks R8A7740_CLK_USB24S>,
533 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
540 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
553 clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;
560 clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
588 clocks = <&cpg_clocks R8A7740_CLK_S>,
589 <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>
    [all...]
r8a7740.dtsi 479 cpg_clocks: cpg_clocks@e6150000 { label
497 <&cpg_clocks R8A7740_CLK_USB24S>,
506 <&cpg_clocks R8A7740_CLK_USB24S>,
533 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
540 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
553 clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;
560 clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
588 clocks = <&cpg_clocks R8A7740_CLK_S>,
589 <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>
    [all...]
r8a7740.dtsi 479 cpg_clocks: cpg_clocks@e6150000 { label
497 <&cpg_clocks R8A7740_CLK_USB24S>,
506 <&cpg_clocks R8A7740_CLK_USB24S>,
533 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
540 <&cpg_clocks R8A7740_CLK_USB24S>, <0>, <0>;
553 clocks = <&cpg_clocks R8A7740_CLK_PLLC0>;
560 clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
588 clocks = <&cpg_clocks R8A7740_CLK_S>,
589 <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>
    [all...]
r8a73a4.dtsi 27 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
479 cpg_clocks: cpg_clocks@e6150000 { label
495 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
502 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
509 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
516 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
523 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>
    [all...]
sh73a0.dtsi 27 clocks = <&cpg_clocks SH73A0_CLK_Z>;
36 clocks = <&cpg_clocks SH73A0_CLK_Z>;
646 cpg_clocks: cpg_clocks@e6150000 { label
661 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
663 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
670 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
672 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
679 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
681 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>
    [all...]
r8a73a4.dtsi 27 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
479 cpg_clocks: cpg_clocks@e6150000 { label
495 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
502 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
509 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
516 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
523 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>
    [all...]
sh73a0.dtsi 27 clocks = <&cpg_clocks SH73A0_CLK_Z>;
36 clocks = <&cpg_clocks SH73A0_CLK_Z>;
646 cpg_clocks: cpg_clocks@e6150000 { label
661 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
663 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
670 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
672 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
679 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
681 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>
    [all...]
r8a73a4.dtsi 27 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
479 cpg_clocks: cpg_clocks@e6150000 { label
495 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
502 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
509 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
516 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
523 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>
    [all...]
sh73a0.dtsi 27 clocks = <&cpg_clocks SH73A0_CLK_Z>;
36 clocks = <&cpg_clocks SH73A0_CLK_Z>;
646 cpg_clocks: cpg_clocks@e6150000 { label
661 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
663 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
670 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
672 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
679 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
681 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>
    [all...]
r8a73a4.dtsi 27 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
479 cpg_clocks: cpg_clocks@e6150000 { label
495 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
502 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
509 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
516 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
523 clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>
    [all...]
sh73a0.dtsi 27 clocks = <&cpg_clocks SH73A0_CLK_Z>;
36 clocks = <&cpg_clocks SH73A0_CLK_Z>;
646 cpg_clocks: cpg_clocks@e6150000 { label
661 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
663 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
670 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
672 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>,
679 clocks = <&pll1_div2_clk>, <&cpg_clocks SH73A0_CLK_PLL2>,
681 <&extalr_clk>, <&cpg_clocks SH73A0_CLK_MAIN>
    [all...]

Completed in 282 milliseconds