/src/sys/arch/arm/rockchip/ |
rk_anxdp.c | 78 rk_anxdp_select_input(struct rk_anxdp_softc *sc, u_int crtc_index) 81 const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0; 115 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_anxdp_encoder_prepare 117 rk_anxdp_select_input(sc, crtc_index);
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rk_dwhdmi.c | 99 rk_dwhdmi_select_input(struct rk_dwhdmi_softc *sc, u_int crtc_index) 102 const uint32_t write_val = crtc_index == 0 ? HDMI_LCDC_SEL : 0; 113 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_dwhdmi_encoder_enable 115 rk_dwhdmi_select_input(sc, crtc_index);
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rk_anxdp.c | 78 rk_anxdp_select_input(struct rk_anxdp_softc *sc, u_int crtc_index) 81 const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0; 115 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_anxdp_encoder_prepare 117 rk_anxdp_select_input(sc, crtc_index);
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rk_dwhdmi.c | 99 rk_dwhdmi_select_input(struct rk_dwhdmi_softc *sc, u_int crtc_index) 102 const uint32_t write_val = crtc_index == 0 ? HDMI_LCDC_SEL : 0; 113 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_dwhdmi_encoder_enable 115 rk_dwhdmi_select_input(sc, crtc_index);
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rk_anxdp.c | 78 rk_anxdp_select_input(struct rk_anxdp_softc *sc, u_int crtc_index) 81 const uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0; 115 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_anxdp_encoder_prepare 117 rk_anxdp_select_input(sc, crtc_index);
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rk_dwhdmi.c | 99 rk_dwhdmi_select_input(struct rk_dwhdmi_softc *sc, u_int crtc_index) 102 const uint32_t write_val = crtc_index == 0 ? HDMI_LCDC_SEL : 0; 113 const u_int crtc_index = drm_crtc_index(encoder->crtc); local in function:rk_dwhdmi_encoder_enable 115 rk_dwhdmi_select_input(sc, crtc_index);
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/src/sys/external/bsd/drm2/dist/drm/amd/include/ |
dm_pp_interface.h | 99 uint32_t crtc_index; member in struct:amd_pp_display_configuration
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dm_pp_interface.h | 99 uint32_t crtc_index; member in struct:amd_pp_display_configuration
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dm_pp_interface.h | 99 uint32_t crtc_index; member in struct:amd_pp_display_configuration
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/src/sys/arch/arm/sunxi/ |
sunxi_lcdc.c | 358 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_enable_vblank 360 if (crtc_index == 0) 377 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_setup_vblank 384 drm_sc->sc_vbl[crtc_index].priv = sc; 385 drm_sc->sc_vbl[crtc_index].get_vblank_counter = sunxi_lcdc_get_vblank_counter; 386 drm_sc->sc_vbl[crtc_index].enable_vblank = sunxi_lcdc_enable_vblank; 387 drm_sc->sc_vbl[crtc_index].disable_vblank = sunxi_lcdc_disable_vblank; 452 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_intr 453 const uint32_t status_mask = crtc_index == 0 ? 460 drm_handle_vblank(sc->sc_encoder.base.dev, crtc_index); [all...] |
sunxi_lcdc.c | 358 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_enable_vblank 360 if (crtc_index == 0) 377 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_setup_vblank 384 drm_sc->sc_vbl[crtc_index].priv = sc; 385 drm_sc->sc_vbl[crtc_index].get_vblank_counter = sunxi_lcdc_get_vblank_counter; 386 drm_sc->sc_vbl[crtc_index].enable_vblank = sunxi_lcdc_enable_vblank; 387 drm_sc->sc_vbl[crtc_index].disable_vblank = sunxi_lcdc_disable_vblank; 452 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_intr 453 const uint32_t status_mask = crtc_index == 0 ? 460 drm_handle_vblank(sc->sc_encoder.base.dev, crtc_index); [all...] |
sunxi_lcdc.c | 358 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_enable_vblank 360 if (crtc_index == 0) 377 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_setup_vblank 384 drm_sc->sc_vbl[crtc_index].priv = sc; 385 drm_sc->sc_vbl[crtc_index].get_vblank_counter = sunxi_lcdc_get_vblank_counter; 386 drm_sc->sc_vbl[crtc_index].enable_vblank = sunxi_lcdc_enable_vblank; 387 drm_sc->sc_vbl[crtc_index].disable_vblank = sunxi_lcdc_disable_vblank; 452 const int crtc_index = ffs32(sc->sc_encoder.base.possible_crtcs) - 1; local in function:sunxi_lcdc_intr 453 const uint32_t status_mask = crtc_index == 0 ? 460 drm_handle_vblank(sc->sc_encoder.base.dev, crtc_index); [all...] |
sunxi_mixer.c | 1067 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_init 1070 CSC_WRITE(sc, crtc_index, CSC_COEFF0_REG(0) + i * 4, yuv2rgb[i]); 1072 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, CSC_BYPASS_DISABLE); 1078 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_disable 1080 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, 0);
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sunxi_mixer.c | 1067 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_init 1070 CSC_WRITE(sc, crtc_index, CSC_COEFF0_REG(0) + i * 4, yuv2rgb[i]); 1072 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, CSC_BYPASS_DISABLE); 1078 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_disable 1080 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, 0);
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sunxi_mixer.c | 1067 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_init 1070 CSC_WRITE(sc, crtc_index, CSC_COEFF0_REG(0) + i * 4, yuv2rgb[i]); 1072 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, CSC_BYPASS_DISABLE); 1078 const u_int crtc_index = drm_crtc_index(&sc->sc_crtc.base); local in function:sunxi_mixer_csc_disable 1080 CSC_WRITE(sc, crtc_index, CSC_BYPASS_REG, 0);
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/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
dm_services_types.h | 210 uint8_t crtc_index; member in struct:dm_pp_display_configuration
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dm_services_types.h | 210 uint8_t crtc_index; member in struct:dm_pp_display_configuration
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dm_services_types.h | 210 uint8_t crtc_index; member in struct:dm_pp_display_configuration
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