| /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/ |
| amdgpu_dmub_srv.c | 341 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; local in function:dmub_srv_hw_init
380 cw3.offset.quad_part = bios_fb->gpu_addr;
381 cw3.region.base = DMUB_CW3_BASE;
382 cw3.region.top = cw3.region.base + bios_fb->size;
385 cw4.region.base = cw3.region.top + 1;
402 dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4,
|
| amdgpu_dmub_srv.c | 341 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; local in function:dmub_srv_hw_init
380 cw3.offset.quad_part = bios_fb->gpu_addr;
381 cw3.region.base = DMUB_CW3_BASE;
382 cw3.region.top = cw3.region.base + bios_fb->size;
385 cw4.region.base = cw3.region.top + 1;
402 dmub->hw_funcs.setup_windows(dmub, &cw2, &cw3, &cw4,
|
| /src/sys/dev/qbus/ |
| tsreg.h | 90 unsigned short cw3; /* count parameter */ member in struct:cmd
|
| tsreg.h | 90 unsigned short cw3; /* count parameter */ member in struct:cmd
|
