| /src/sys/external/bsd/drm2/dist/drm/radeon/ |
| radeon_bios.c | 325 u32 d2vga_control; local in function:ni_read_disabled_bios
332 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
344 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
357 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
369 uint32_t d2vga_control; local in function:r700_read_disabled_bios
379 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
392 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
427 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
438 uint32_t d2vga_control; local in function:r600_read_disabled_bios
452 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL)
516 uint32_t d2vga_control; local in function:avivo_read_disabled_bios
[all...] |
| radeon_bios.c | 325 u32 d2vga_control; local in function:ni_read_disabled_bios
332 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
344 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
357 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
369 uint32_t d2vga_control; local in function:r700_read_disabled_bios
379 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
392 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
427 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
438 uint32_t d2vga_control; local in function:r600_read_disabled_bios
452 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL)
516 uint32_t d2vga_control; local in function:avivo_read_disabled_bios
[all...] |
| radeon_bios.c | 325 u32 d2vga_control; local in function:ni_read_disabled_bios
332 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
344 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
357 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
369 uint32_t d2vga_control; local in function:r700_read_disabled_bios
379 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
392 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
427 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
438 uint32_t d2vga_control; local in function:r600_read_disabled_bios
452 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL)
516 uint32_t d2vga_control; local in function:avivo_read_disabled_bios
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| amdgpu_cik.c | 902 u32 d2vga_control = 0; local in function:cik_read_disabled_bios
910 d2vga_control = RREG32(mmD2VGA_CONTROL);
923 (d2vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |
936 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
| amdgpu_si.c | 1133 u32 d2vga_control = 0; local in function:si_read_disabled_bios
1141 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
1154 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
1167 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
|
| amdgpu_vi.c | 386 u32 d2vga_control = 0; local in function:vi_read_disabled_bios
394 d2vga_control = RREG32(mmD2VGA_CONTROL);
407 (d2vga_control & ~(D2VGA_CONTROL__D2VGA_MODE_ENABLE_MASK |
420 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
| amdgpu_cik.c | 902 u32 d2vga_control = 0; local in function:cik_read_disabled_bios
910 d2vga_control = RREG32(mmD2VGA_CONTROL);
923 (d2vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |
936 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
| amdgpu_si.c | 1133 u32 d2vga_control = 0; local in function:si_read_disabled_bios
1141 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
1154 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
1167 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
|
| amdgpu_vi.c | 386 u32 d2vga_control = 0; local in function:vi_read_disabled_bios
394 d2vga_control = RREG32(mmD2VGA_CONTROL);
407 (d2vga_control & ~(D2VGA_CONTROL__D2VGA_MODE_ENABLE_MASK |
420 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
| amdgpu_cik.c | 902 u32 d2vga_control = 0; local in function:cik_read_disabled_bios
910 d2vga_control = RREG32(mmD2VGA_CONTROL);
923 (d2vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK |
936 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
| amdgpu_si.c | 1133 u32 d2vga_control = 0; local in function:si_read_disabled_bios
1141 d2vga_control = RREG32(AVIVO_D2VGA_CONTROL);
1154 (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE |
1167 WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);
|
| amdgpu_vi.c | 386 u32 d2vga_control = 0; local in function:vi_read_disabled_bios
394 d2vga_control = RREG32(mmD2VGA_CONTROL);
407 (d2vga_control & ~(D2VGA_CONTROL__D2VGA_MODE_ENABLE_MASK |
420 WREG32(mmD2VGA_CONTROL, d2vga_control);
|
