| /src/sys/arch/hpcsh/dev/ |
| j6x0lcd.c | 181 uint8_t dcr, ddr; local in function:j6x0lcd_attach
196 ddr = DAC_(DR0);
197 sc->sc_brightness = J6X0LCD_DA_TO_BRIGHTNESS(ddr);
|
| j6x0lcd.c | 181 uint8_t dcr, ddr; local in function:j6x0lcd_attach
196 ddr = DAC_(DR0);
197 sc->sc_brightness = J6X0LCD_DA_TO_BRIGHTNESS(ddr);
|
| j6x0lcd.c | 181 uint8_t dcr, ddr; local in function:j6x0lcd_attach
196 ddr = DAC_(DR0);
197 sc->sc_brightness = J6X0LCD_DA_TO_BRIGHTNESS(ddr);
|
| j6x0lcd.c | 181 uint8_t dcr, ddr; local in function:j6x0lcd_attach
196 ddr = DAC_(DR0);
197 sc->sc_brightness = J6X0LCD_DA_TO_BRIGHTNESS(ddr);
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| ls1021a.dtsi | 135 ddr: memory-controller@1080000 { label
|
| ls1021a.dtsi | 135 ddr: memory-controller@1080000 { label
|
| ls1021a.dtsi | 135 ddr: memory-controller@1080000 { label
|
| ls1021a.dtsi | 135 ddr: memory-controller@1080000 { label
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| fsl-ls1043a.dtsi | 154 ddr-controller {
160 ddr-ctrler-alert {
166 ddr-ctrler-crit {
425 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1046a.dtsi | 122 ddr-controller {
128 ddr-ctrler-alert {
134 ddr-ctrler-crit {
276 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1043a.dtsi | 154 ddr-controller {
160 ddr-ctrler-alert {
166 ddr-ctrler-crit {
425 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1046a.dtsi | 122 ddr-controller {
128 ddr-ctrler-alert {
134 ddr-ctrler-crit {
276 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1043a.dtsi | 154 ddr-controller {
160 ddr-ctrler-alert {
166 ddr-ctrler-crit {
425 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1046a.dtsi | 122 ddr-controller {
128 ddr-ctrler-alert {
134 ddr-ctrler-crit {
276 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1043a.dtsi | 154 ddr-controller {
160 ddr-ctrler-alert {
166 ddr-ctrler-crit {
425 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1046a.dtsi | 122 ddr-controller {
128 ddr-ctrler-alert {
134 ddr-ctrler-crit {
276 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1028a.dtsi | 141 ddr-controller {
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
197 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1028a.dtsi | 141 ddr-controller {
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
197 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1028a.dtsi | 141 ddr-controller {
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
197 ddr: memory-controller@1080000 { label in label:soc
|
| fsl-ls1028a.dtsi | 141 ddr-controller {
147 ddr-ctrler-alert {
153 ddr-ctrler-crit {
197 ddr: memory-controller@1080000 { label in label:soc
|
| /src/sys/arch/arm/rockchip/ |
| rk_gpio.c | 242 uint32_t ddr; local in function:rk_gpio_pin_ctl
247 ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
249 ddr &= ~__BIT(pin);
251 ddr |= __BIT(pin);
252 WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
293 uint32_t ddr; local in function:rk_gpio_v2_pin_ctl
298 ddr = (flags & GPIO_PIN_OUTPUT) ? GPIOV2_DATA_MASK(pin) : 0;
299 WR4(sc, GPIOV2_SWPORT_DDR_REG(pin), GPIOV2_WRITE_MASK(pin) | ddr);
|
| rk_gpio.c | 242 uint32_t ddr; local in function:rk_gpio_pin_ctl
247 ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
249 ddr &= ~__BIT(pin);
251 ddr |= __BIT(pin);
252 WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
293 uint32_t ddr; local in function:rk_gpio_v2_pin_ctl
298 ddr = (flags & GPIO_PIN_OUTPUT) ? GPIOV2_DATA_MASK(pin) : 0;
299 WR4(sc, GPIOV2_SWPORT_DDR_REG(pin), GPIOV2_WRITE_MASK(pin) | ddr);
|
| rk_gpio.c | 242 uint32_t ddr; local in function:rk_gpio_pin_ctl
247 ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
249 ddr &= ~__BIT(pin);
251 ddr |= __BIT(pin);
252 WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
293 uint32_t ddr; local in function:rk_gpio_v2_pin_ctl
298 ddr = (flags & GPIO_PIN_OUTPUT) ? GPIOV2_DATA_MASK(pin) : 0;
299 WR4(sc, GPIOV2_SWPORT_DDR_REG(pin), GPIOV2_WRITE_MASK(pin) | ddr);
|
| rk_gpio.c | 242 uint32_t ddr; local in function:rk_gpio_pin_ctl
247 ddr = RD4(sc, GPIO_SWPORTA_DDR_REG);
249 ddr &= ~__BIT(pin);
251 ddr |= __BIT(pin);
252 WR4(sc, GPIO_SWPORTA_DDR_REG, ddr);
293 uint32_t ddr; local in function:rk_gpio_v2_pin_ctl
298 ddr = (flags & GPIO_PIN_OUTPUT) ? GPIOV2_DATA_MASK(pin) : 0;
299 WR4(sc, GPIOV2_SWPORT_DDR_REG(pin), GPIOV2_WRITE_MASK(pin) | ddr);
|
| /src/sys/dev/sdmmc/ |
| sdmmc_mem.c | 806 bool ddr = false; local in function:sdmmc_mem_sd_init
896 ddr = true;
907 if (sc->sc_busclk != bus_clock || sc->sc_busddr != ddr) {
910 ddr);
917 sc->sc_busddr = ddr;
966 bool ddr = false; local in function:sdmmc_mem_mmc_init
1001 ddr = true;
1096 if (ddr &&
1104 DPRINTF(("%s: can't switch to DDR"
1120 sc->sc_busclk, ddr);
[all...] |
