| /src/sys/arch/riscv/sifive/ |
| fu540_prci.c | 118 u_int rate, divr, divf, divq; local
123 divq = __SHIFTOUT(val, PLL0_DIVQ);
125 rate <<= divq; local
|
| fu540_prci.c | 118 u_int rate, divr, divf, divq; local
123 divq = __SHIFTOUT(val, PLL0_DIVQ);
125 rate <<= divq; local
|
| /src/external/gpl3/gdb.old/dist/sim/bfin/ |
| bfin-sim.c | 1162 Initialize for DIVQ. Set the AQ status bit based on the signs of
1180 /* DIVQ ( Dreg, Dreg ) ;
1186 divq (SIM_CPU *cpu, bu32 pquo, bu16 divisor) function
2610 TRACE_INSN (cpu, "DIVQ ( R%i, R%i );", dst, src);
2611 SET_DREG (dst, divq (cpu, DREG (dst), (bu16)DREG (src)));
|
| bfin-sim.c | 1162 Initialize for DIVQ. Set the AQ status bit based on the signs of
1180 /* DIVQ ( Dreg, Dreg ) ;
1186 divq (SIM_CPU *cpu, bu32 pquo, bu16 divisor) function
2610 TRACE_INSN (cpu, "DIVQ ( R%i, R%i );", dst, src);
2611 SET_DREG (dst, divq (cpu, DREG (dst), (bu16)DREG (src)));
|
| /src/external/gpl3/gdb/dist/sim/bfin/ |
| bfin-sim.c | 1162 Initialize for DIVQ. Set the AQ status bit based on the signs of
1180 /* DIVQ ( Dreg, Dreg ) ;
1186 divq (SIM_CPU *cpu, bu32 pquo, bu16 divisor) function
2610 TRACE_INSN (cpu, "DIVQ ( R%i, R%i );", dst, src);
2611 SET_DREG (dst, divq (cpu, DREG (dst), (bu16)DREG (src)));
|
| bfin-sim.c | 1162 Initialize for DIVQ. Set the AQ status bit based on the signs of
1180 /* DIVQ ( Dreg, Dreg ) ;
1186 divq (SIM_CPU *cpu, bu32 pquo, bu16 divisor) function
2610 TRACE_INSN (cpu, "DIVQ ( R%i, R%i );", dst, src);
2611 SET_DREG (dst, divq (cpu, DREG (dst), (bu16)DREG (src)));
|
