| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/ |
| amdgpu_dc_link_dp.c | 3135 static void dp_wa_power_up_0010FA(struct dc_link *link, uint8_t *dpcd_data,
3144 dpcd_data, length);
3145 link->dpcd_caps.dpcd_rev.raw = dpcd_data[
3178 uint8_t dpcd_data[16]; local in function:retrieve_link_cap
3206 memset(dpcd_data, '\0', sizeof(dpcd_data));
3228 dpcd_data,
3229 sizeof(dpcd_data));
3289 dpcd_data[DP_TRAINING_AUX_RD_INTERVAL];
3305 memcpy(dpcd_data, ext_cap_data, sizeof(dpcd_data))
3453 uint8_t dpcd_data[16]; local in function:dp_overwrite_extended_receiver_cap
[all...] |
| amdgpu_dc_link_dp.c | 3135 static void dp_wa_power_up_0010FA(struct dc_link *link, uint8_t *dpcd_data,
3144 dpcd_data, length);
3145 link->dpcd_caps.dpcd_rev.raw = dpcd_data[
3178 uint8_t dpcd_data[16]; local in function:retrieve_link_cap
3206 memset(dpcd_data, '\0', sizeof(dpcd_data));
3228 dpcd_data,
3229 sizeof(dpcd_data));
3289 dpcd_data[DP_TRAINING_AUX_RD_INTERVAL];
3305 memcpy(dpcd_data, ext_cap_data, sizeof(dpcd_data))
3453 uint8_t dpcd_data[16]; local in function:dp_overwrite_extended_receiver_cap
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm.c | 8256 uint8_t dpcd_data; local in function:is_dp_capable_without_timing_msa
8264 &dpcd_data,
8265 sizeof(dpcd_data))) {
8266 capable = (dpcd_data & DP_MSA_TIMING_PAR_IGNORED) ? true:false;
8368 uint8_t dpcd_data[EDP_PSR_RECEIVER_CAP_SIZE]; local in function:amdgpu_dm_set_psr_caps
8375 dpcd_data, sizeof(dpcd_data))) {
8376 link->psr_feature_enabled = dpcd_data[0] ? true:false;
|
| amdgpu_dm.c | 8256 uint8_t dpcd_data; local in function:is_dp_capable_without_timing_msa
8264 &dpcd_data,
8265 sizeof(dpcd_data))) {
8266 capable = (dpcd_data & DP_MSA_TIMING_PAR_IGNORED) ? true:false;
8368 uint8_t dpcd_data[EDP_PSR_RECEIVER_CAP_SIZE]; local in function:amdgpu_dm_set_psr_caps
8375 dpcd_data, sizeof(dpcd_data))) {
8376 link->psr_feature_enabled = dpcd_data[0] ? true:false;
|
