| /src/sys/arch/dreamcast/dreamcast/ |
| machdep.c | 267 int evtcode; local in function:intc_intr
271 evtcode = _reg_read_4(SH4_INTEVT);
273 ih = EVTCODE_IH(evtcode);
281 if (evtcode == SH_INTEVT_TMU0_TUNI0) { /* hardclock */
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| machdep.c | 267 int evtcode; local in function:intc_intr
271 evtcode = _reg_read_4(SH4_INTEVT);
273 ih = EVTCODE_IH(evtcode);
281 if (evtcode == SH_INTEVT_TMU0_TUNI0) { /* hardclock */
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| /src/sys/arch/sh3/sh3/ |
| interrupt.c | 55 * EVTCODE to intc_intrhand mapper.
109 intc_intr_establish(int evtcode, int trigger, int level,
114 KDASSERT(evtcode >= 0x200 && level > 0);
120 ih->ih_evtcode = evtcode;
123 EVTCODE_TO_IH_INDEX(evtcode) = ih->ih_idx;
126 intc_intr_priority(evtcode, level);
137 int evtcode = ih->ih_evtcode; local in function:intc_intr_disestablish
140 intc_intr_priority(evtcode, 0);
143 EVTCODE_TO_IH_INDEX(evtcode) = 0;
149 intc_intr_disable(int evtcode)
[all...] |
| interrupt.c | 55 * EVTCODE to intc_intrhand mapper.
109 intc_intr_establish(int evtcode, int trigger, int level,
114 KDASSERT(evtcode >= 0x200 && level > 0);
120 ih->ih_evtcode = evtcode;
123 EVTCODE_TO_IH_INDEX(evtcode) = ih->ih_idx;
126 intc_intr_priority(evtcode, level);
137 int evtcode = ih->ih_evtcode; local in function:intc_intr_disestablish
140 intc_intr_priority(evtcode, 0);
143 EVTCODE_TO_IH_INDEX(evtcode) = 0;
149 intc_intr_disable(int evtcode)
[all...] |
| /src/sys/arch/evbsh3/evbsh3/ |
| machdep.c | 534 int evtcode; local in function:intc_intr
542 evtcode = _reg_read_4(SH3_INTEVT);
547 evtcode = _reg_read_4(SH7709_INTEVT2);
554 evtcode = _reg_read_4(SH4_INTEVT);
563 ih = EVTCODE_IH(evtcode);
573 switch (evtcode) {
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| machdep.c | 534 int evtcode; local in function:intc_intr
542 evtcode = _reg_read_4(SH3_INTEVT);
547 evtcode = _reg_read_4(SH7709_INTEVT2);
554 evtcode = _reg_read_4(SH4_INTEVT);
563 ih = EVTCODE_IH(evtcode);
573 switch (evtcode) {
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| /src/sys/arch/evbsh3/ap_ms104_sh4/ |
| ap_ms104_sh4_intr.c | 100 int evtcode; local in function:extintr_establish
121 evtcode = 0x200 + (irq << 5);
122 eih->eih_func = intc_intr_establish(evtcode, trigger, level,
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| ap_ms104_sh4_intr.c | 100 int evtcode; local in function:extintr_establish
121 evtcode = 0x200 + (irq << 5);
122 eih->eih_func = intc_intr_establish(evtcode, trigger, level,
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| /src/sys/arch/landisk/landisk/ |
| intr.c | 78 int evtcode; local in function:intc_intr
82 evtcode = _reg_read_4(SH4_INTEVT);
83 ih = EVTCODE_IH(evtcode);
86 switch (evtcode) {
95 bit = 1 << (EVTCODE_TO_MAP_INDEX(evtcode) - 5);
141 int evtcode; local in function:extintr_establish
162 evtcode = 0x200 + (irq << 5);
163 eih->eih_func = intc_intr_establish(evtcode, IST_LEVEL, level,
|
| intr.c | 78 int evtcode; local in function:intc_intr
82 evtcode = _reg_read_4(SH4_INTEVT);
83 ih = EVTCODE_IH(evtcode);
86 switch (evtcode) {
95 bit = 1 << (EVTCODE_TO_MAP_INDEX(evtcode) - 5);
141 int evtcode; local in function:extintr_establish
162 evtcode = 0x200 + (irq << 5);
163 eih->eih_func = intc_intr_establish(evtcode, IST_LEVEL, level,
|
| /src/sys/arch/hpcsh/hpcsh/ |
| machdep.c | 591 int evtcode; local in function:intc_intr
596 evtcode = _reg_read_4(CPU_IS_SH3 ? SH7709_INTEVT2 : SH4_INTEVT);
598 ih = EVTCODE_IH(evtcode);
610 if (evtcode == SH_INTEVT_TMU0_TUNI0) {
617 } else if (evtcode ==
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| machdep.c | 591 int evtcode; local in function:intc_intr
596 evtcode = _reg_read_4(CPU_IS_SH3 ? SH7709_INTEVT2 : SH4_INTEVT);
598 ih = EVTCODE_IH(evtcode);
610 if (evtcode == SH_INTEVT_TMU0_TUNI0) {
617 } else if (evtcode ==
|
| /src/sys/arch/sh3/dev/ |
| shpcic.c | 322 int evtcode; local in function:shpcic_set_intr_priority
332 evtcode = SH4_INTEVT_PCIERR;
334 evtcode = SH4_INTEVT_PCISERR;
337 intpri_intr_priority(evtcode, shpcic_intr_priority[intr]);
344 shpcic_intr_establish(int evtcode, int (*ih_func)(void *), void *ih_arg)
348 switch (evtcode) {
364 printf("shpcic_intr_establish: unknown evtcode = 0x%08x\n",
365 evtcode);
369 return intc_intr_establish(evtcode, IST_LEVEL, level, ih_func, ih_arg);
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| shpcic.c | 322 int evtcode; local in function:shpcic_set_intr_priority
332 evtcode = SH4_INTEVT_PCIERR;
334 evtcode = SH4_INTEVT_PCISERR;
337 intpri_intr_priority(evtcode, shpcic_intr_priority[intr]);
344 shpcic_intr_establish(int evtcode, int (*ih_func)(void *), void *ih_arg)
348 switch (evtcode) {
364 printf("shpcic_intr_establish: unknown evtcode = 0x%08x\n",
365 evtcode);
369 return intc_intr_establish(evtcode, IST_LEVEL, level, ih_func, ih_arg);
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| /src/sys/arch/mmeye/mmeye/ |
| machdep.c | 651 int evtcode; local in function:intc_intr
655 evtcode = _reg_read_4(SH_(INTEVT));
657 ih = EVTCODE_IH(evtcode);
667 if (evtcode == SH_INTEVT_TMU0_TUNI0) { /* hardclock */
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| machdep.c | 651 int evtcode; local in function:intc_intr
655 evtcode = _reg_read_4(SH_(INTEVT));
657 ih = EVTCODE_IH(evtcode);
667 if (evtcode == SH_INTEVT_TMU0_TUNI0) { /* hardclock */
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