| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| amdgpu_dce120_timing_generator.c | 315 uint32_t falling_edge = 0; local in function:dce120_timing_generator_enable_reset_trigger
329 falling_edge = 1;
339 FD(CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL), falling_edge,
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| amdgpu_dce120_timing_generator.c | 315 uint32_t falling_edge = 0; local in function:dce120_timing_generator_enable_reset_trigger
329 falling_edge = 1;
339 FD(CRTC0_CRTC_TRIGB_CNTL__CRTC_TRIGB_FALLING_EDGE_DETECT_CNTL), falling_edge,
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| amdgpu_dce110_timing_generator.c | 1505 uint32_t falling_edge = 0; local in function:dce110_timing_generator_enable_reset_trigger
1521 falling_edge = 1;
1545 falling_edge,
1595 uint32_t falling_edge = 0; local in function:dce110_timing_generator_enable_crtc_reset
1605 falling_edge = 1;
1627 falling_edge,
|
| amdgpu_dce110_timing_generator.c | 1505 uint32_t falling_edge = 0; local in function:dce110_timing_generator_enable_reset_trigger
1521 falling_edge = 1;
1545 falling_edge,
1595 uint32_t falling_edge = 0; local in function:dce110_timing_generator_enable_crtc_reset
1605 falling_edge = 1;
1627 falling_edge,
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| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| amdgpu_dcn10_optc.c | 686 uint32_t falling_edge; local in function:optc1_enable_reset_trigger
689 OTG_V_SYNC_A_POL, &falling_edge);
691 if (falling_edge)
723 uint32_t falling_edge = 0; local in function:optc1_enable_crtc_reset
733 falling_edge = 1;
745 OTG_TRIGA_FALLING_EDGE_DETECT_CNTL, falling_edge);
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| amdgpu_dcn10_optc.c | 686 uint32_t falling_edge; local in function:optc1_enable_reset_trigger
689 OTG_V_SYNC_A_POL, &falling_edge);
691 if (falling_edge)
723 uint32_t falling_edge = 0; local in function:optc1_enable_crtc_reset
733 falling_edge = 1;
745 OTG_TRIGA_FALLING_EDGE_DETECT_CNTL, falling_edge);
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