/src/sys/arch/arm/cortex/ |
gicv3.c | 146 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 165 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 250 uint32_t gicd_ctrl; local in function:gicv3_dist_enable 254 gicd_ctrl = gicd_read_4(sc, GICD_CTRL); 255 gicd_ctrl &= ~(GICD_CTRL_EnableGrp1A | GICD_CTRL_ARE_NS); 256 gicd_write_4(sc, GICD_CTRL, gicd_ctrl); 259 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 281 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP 811 const uint32_t gicd_ctrl = gicd_read_4(sc, GICD_CTRL); local in function:gicv3_dist_is_nonsecure [all...] |
gicv3.c | 146 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 165 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 250 uint32_t gicd_ctrl; local in function:gicv3_dist_enable 254 gicd_ctrl = gicd_read_4(sc, GICD_CTRL); 255 gicd_ctrl &= ~(GICD_CTRL_EnableGrp1A | GICD_CTRL_ARE_NS); 256 gicd_write_4(sc, GICD_CTRL, gicd_ctrl); 259 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP) 281 while (gicd_read_4(sc, GICD_CTRL) & GICD_CTRL_RWP 811 const uint32_t gicd_ctrl = gicd_read_4(sc, GICD_CTRL); local in function:gicv3_dist_is_nonsecure [all...] |