| /src/sys/arch/hppa/spmath/ |
| divu.S | 54 gr0: .reg %r0 /* General register zero */ label
74 addi -1,gr0,tp ; set V-bit to 1
|
| divu.S | 54 gr0: .reg %r0 /* General register zero */ label
74 addi -1,gr0,tp ; set V-bit to 1
|
| impys.S | 58 gr0: .equ 0 /* General register zero */ label
85 addi -1,gr0,pm ; initialize pm to 111...1
86 comb,< op2,gr0,mpyb ; br. if multiplier < 0
88 mpy1: comb,< op1,gr0,mpya ; br. if multiplicand < 0
89 addi 0,gr0,pu ; clear product
91 mpy2: addi 1,gr0,pc ; initialize pc to 00...01
102 mloop: blr brindex,gr0 ; br. into table
209 mpyb: add,= op2,op2,gr0 ; if <> 0, back to main sect.
212 add,>= op1,gr0,gr0 ; if op1 < 0, invert sign
[all...] |
| impyu.S | 58 gr0: .equ 0 ; General register zero label
93 addi 0,gr0,pu ; clear product
95 addi 0,gr0,saveop2 ; clear saveop2
102 add op2,gr0,saveop2 ; save op2 in saveop2
103 shd gr0,op2,1,pu ; shift op2 left 31 for result
105 shd op2,gr0,1,pl
107 mpy1: addi -1,gr0,pm ; initialize pm to 111...1
108 addi 1,gr0,pc ; initialize pc to 00...01
119 mloop: blr brindex,gr0 ; br. into table
221 addb,=,n saveop2,gr0,fini ; check saveop
[all...] |
| impys.S | 58 gr0: .equ 0 /* General register zero */ label
85 addi -1,gr0,pm ; initialize pm to 111...1
86 comb,< op2,gr0,mpyb ; br. if multiplier < 0
88 mpy1: comb,< op1,gr0,mpya ; br. if multiplicand < 0
89 addi 0,gr0,pu ; clear product
91 mpy2: addi 1,gr0,pc ; initialize pc to 00...01
102 mloop: blr brindex,gr0 ; br. into table
209 mpyb: add,= op2,op2,gr0 ; if <> 0, back to main sect.
212 add,>= op1,gr0,gr0 ; if op1 < 0, invert sign
[all...] |
| impyu.S | 58 gr0: .equ 0 ; General register zero label
93 addi 0,gr0,pu ; clear product
95 addi 0,gr0,saveop2 ; clear saveop2
102 add op2,gr0,saveop2 ; save op2 in saveop2
103 shd gr0,op2,1,pu ; shift op2 left 31 for result
105 shd op2,gr0,1,pl
107 mpy1: addi -1,gr0,pm ; initialize pm to 111...1
108 addi 1,gr0,pc ; initialize pc to 00...01
119 mloop: blr brindex,gr0 ; br. into table
221 addb,=,n saveop2,gr0,fini ; check saveop
[all...] |
