| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_dpll_mgr.h | 234 * @hw_state: hardware configuration for the DPLL stored in
237 struct intel_dpll_hw_state hw_state; member in struct:intel_shared_dpll_state
282 struct intel_dpll_hw_state *hw_state);
385 const struct intel_dpll_hw_state *hw_state);
|
| intel_dpll_mgr.h | 234 * @hw_state: hardware configuration for the DPLL stored in
237 struct intel_dpll_hw_state hw_state; member in struct:intel_shared_dpll_state
282 struct intel_dpll_hw_state *hw_state);
385 const struct intel_dpll_hw_state *hw_state);
|
| intel_dpll_mgr.h | 234 * @hw_state: hardware configuration for the DPLL stored in
237 struct intel_dpll_hw_state hw_state; member in struct:intel_shared_dpll_state
282 struct intel_dpll_hw_state *hw_state);
385 const struct intel_dpll_hw_state *hw_state);
|
| intel_dpll_mgr.h | 234 * @hw_state: hardware configuration for the DPLL stored in
237 struct intel_dpll_hw_state hw_state; member in struct:intel_shared_dpll_state
282 struct intel_dpll_hw_state *hw_state);
385 const struct intel_dpll_hw_state *hw_state);
|
| intel_dpll_mgr.c | 126 struct intel_dpll_hw_state hw_state; local in function:assert_shared_dpll
131 cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state);
279 &shared_dpll[i].hw_state,
313 shared_dpll[id].hw_state = *pll_state;
377 struct intel_dpll_hw_state *hw_state)
389 hw_state->dpll = val;
390 hw_state->fp0 = I915_READ(PCH_FP0(id));
391 hw_state->fp1 = I915_READ(PCH_FP1(id));
403 I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0);
404 I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1)
3331 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_dpll_write
3356 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_mg_pll_write
3406 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:dkl_pll_write
[all...] |
| intel_dpll_mgr.c | 126 struct intel_dpll_hw_state hw_state; local in function:assert_shared_dpll
131 cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state);
279 &shared_dpll[i].hw_state,
313 shared_dpll[id].hw_state = *pll_state;
377 struct intel_dpll_hw_state *hw_state)
389 hw_state->dpll = val;
390 hw_state->fp0 = I915_READ(PCH_FP0(id));
391 hw_state->fp1 = I915_READ(PCH_FP1(id));
403 I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0);
404 I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1)
3331 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_dpll_write
3356 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_mg_pll_write
3406 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:dkl_pll_write
[all...] |
| intel_dpll_mgr.c | 126 struct intel_dpll_hw_state hw_state; local in function:assert_shared_dpll
131 cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state);
279 &shared_dpll[i].hw_state,
313 shared_dpll[id].hw_state = *pll_state;
377 struct intel_dpll_hw_state *hw_state)
389 hw_state->dpll = val;
390 hw_state->fp0 = I915_READ(PCH_FP0(id));
391 hw_state->fp1 = I915_READ(PCH_FP1(id));
403 I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0);
404 I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1)
3331 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_dpll_write
3356 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_mg_pll_write
3406 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:dkl_pll_write
[all...] |
| intel_dpll_mgr.c | 126 struct intel_dpll_hw_state hw_state; local in function:assert_shared_dpll
131 cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state);
279 &shared_dpll[i].hw_state,
313 shared_dpll[id].hw_state = *pll_state;
377 struct intel_dpll_hw_state *hw_state)
389 hw_state->dpll = val;
390 hw_state->fp0 = I915_READ(PCH_FP0(id));
391 hw_state->fp1 = I915_READ(PCH_FP1(id));
403 I915_WRITE(PCH_FP0(id), pll->state.hw_state.fp0);
404 I915_WRITE(PCH_FP1(id), pll->state.hw_state.fp1)
3331 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_dpll_write
3356 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:icl_mg_pll_write
3406 struct intel_dpll_hw_state *hw_state = &pll->state.hw_state; local in function:dkl_pll_write
[all...] |
| intel_display_types.h | 914 struct intel_dpll_hw_state hw_state; member in struct:intel_crtc_state::icl_port_dpll
|
| intel_display_types.h | 914 struct intel_dpll_hw_state hw_state; member in struct:intel_crtc_state::icl_port_dpll
|
| intel_display_types.h | 914 struct intel_dpll_hw_state hw_state; member in struct:intel_crtc_state::icl_port_dpll
|
| intel_display_types.h | 914 struct intel_dpll_hw_state hw_state; member in struct:intel_crtc_state::icl_port_dpll
|
| /src/sys/dev/usb/ |
| mbim.h | 303 uint32_t hw_state; member in struct:mbim_cid_radio_state_info
|
| mbim.h | 303 uint32_t hw_state; member in struct:mbim_cid_radio_state_info
|
| mbim.h | 303 uint32_t hw_state; member in struct:mbim_cid_radio_state_info
|
| mbim.h | 303 uint32_t hw_state; member in struct:mbim_cid_radio_state_info
|
